[PATCH] D30469: [PowerPC] Expand compare instructions to equivalent GPR code sequences.

[Tony Jiang via Phabricator via llvm-commits]

jtony created this revision.

The patterns (equal, equal to zero, great or equal to zero, signed great than zero, signed less or equal than,  signed less than) that used to generate cmpw which sets CR bits are replaced by specific GPR code sequences that are outlined in the Compiler Writer's Guide (Appendix D). This will help us reduce the number of CR logical operations used.

This initial patch only handles those patterns that could be implemented in PPCInstrInfo.td.  More patterns will be implemented in PPCISelDAGToDAG.cpp file in the next patch because of the limitation of table-gen (cannot handle multiple outs).

Note: that some of the test cases are added to test already existing patterns, that's why we have more test cases than patterns.

Also, the SETEQ pattern implemented here in the .td file could also be done in PPCISelDAGToDAG.cpp.


https://reviews.llvm.org/D30469

Files:
  lib/Target/PowerPC/PPCInstrInfo.td
  test/CodeGen/PowerPC/expand-isel.ll
  test/CodeGen/PowerPC/expand-setcc.ll

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