[llvm] r296484 - [AMDGPU] Fix read-undef flags when schedule is reverted

[Stanislav Mekhanoshin via llvm-commits]

Author: rampitec
Date: Tue Feb 28 10:26:27 2017
New Revision: 296484

URL: http://llvm.org/viewvc/llvm-project?rev=296484&view=rev
Log:
[AMDGPU] Fix read-undef flags when schedule is reverted

If two subregs of the same register are defined and we need to revert
schedule changing def order, we will end up with both instructions
having def,read-undef flags because adjustLaneLiveness() will only set
this flag but will not remove it.

Fix this by removing read-undef flags before calling adjustLaneLiveness.

Differential Revision: https://reviews.llvm.org/D30428

Modified:
    llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp?rev=296484&r1=296483&r2=296484&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/GCNSchedStrategy.cpp Tue Feb 28 10:26:27 2017
@@ -348,19 +348,22 @@ void GCNScheduleDAGMILive::schedule() {
     if (MI->getIterator() != RegionEnd) {
       BB->remove(MI);
       BB->insert(RegionEnd, MI);
-      if (LIS) {
+      if (LIS)
         LIS->handleMove(*MI, true);
-        RegisterOperands RegOpers;
-        RegOpers.collect(*MI, *TRI, MRI, ShouldTrackLaneMasks, false);
-        if (ShouldTrackLaneMasks) {
-          // Adjust liveness and add missing dead+read-undef flags.
-          SlotIndex SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
-          RegOpers.adjustLaneLiveness(*LIS, MRI, SlotIdx, MI);
-        } else {
-          // Adjust for missing dead-def flags.
-          RegOpers.detectDeadDefs(*MI, *LIS);
-        }
-      }
+    }
+    // Reset read-undef flags and update them later.
+    for (auto &Op : MI->operands())
+      if (Op.isReg() && Op.isDef())
+        Op.setIsUndef(false);
+    RegisterOperands RegOpers;
+    RegOpers.collect(*MI, *TRI, MRI, ShouldTrackLaneMasks, false);
+    if (ShouldTrackLaneMasks) {
+      // Adjust liveness and add missing dead+read-undef flags.
+      SlotIndex SlotIdx = LIS->getInstructionIndex(*MI).getRegSlot();
+      RegOpers.adjustLaneLiveness(*LIS, MRI, SlotIdx, MI);
+    } else {
+      // Adjust for missing dead-def flags.
+      RegOpers.detectDeadDefs(*MI, *LIS);
     }
     RegionEnd = MI->getIterator();
     ++RegionEnd;