[llvm] r296176 - GlobalISel: check for CImm rather than Imm on G_CONSTANTs.

[Tim Northover via llvm-commits]

Author: tnorthover
Date: Fri Feb 24 15:21:38 2017
New Revision: 296176

URL: http://llvm.org/viewvc/llvm-project?rev=296176&view=rev
Log:
GlobalISel: check for CImm rather than Imm on G_CONSTANTs.

All G_CONSTANTS created by the MachineIRBuilder have an operand of type CImm
(i.e. a ConstantInt), so that's what the selector needs to look for.

Modified:
    llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect-xor.mir

Modified: llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp?rev=296176&r1=296175&r2=296176&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/InstructionSelect.cpp Fri Feb 24 15:21:38 2017
@@ -20,6 +20,7 @@
 #include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
+#include "llvm/IR/Constants.h"
 #include "llvm/IR/Function.h"
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
@@ -187,8 +188,10 @@ bool InstructionSelector::isOperandImmEq
     MachineInstr *Def = MRI.getVRegDef(MO.getReg());
     if (Def->getOpcode() != TargetOpcode::G_CONSTANT)
       return false;
-    assert(Def->getOperand(1).isImm() && "G_CONSTANT values must be constants");
-    return Def->getOperand(1).getImm() == Value;
+    assert(Def->getOperand(1).isCImm() &&
+           "G_CONSTANT values must be constants");
+    const ConstantInt &Imm = *Def->getOperand(1).getCImm();
+    return Imm.getBitWidth() <= 64 && Imm.getSExtValue() == Value;
   }
 
   return false;

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect-xor.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect-xor.mir?rev=296176&r1=296175&r2=296176&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect-xor.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect-xor.mir Fri Feb 24 15:21:38 2017
@@ -100,7 +100,7 @@ body:             |
     liveins: %w0
 
     %0(s32) = COPY %w0
-    %1(s32) = G_CONSTANT -1
+    %1(s32) = G_CONSTANT i64 -1
     %2(s32) = G_XOR %0, %1
 ...
 
@@ -128,7 +128,7 @@ body:             |
     liveins: %x0
 
     %0(s64) = COPY %x0
-    %1(s64) = G_CONSTANT -1
+    %1(s64) = G_CONSTANT i64 -1
     %2(s64) = G_XOR %0, %1
 ...
 
@@ -157,10 +157,9 @@ body:             |
   bb.0:
     liveins: %w0, %w1
     successors: %bb.1
-    %1(s32) = G_CONSTANT -1
+    %1(s32) = G_CONSTANT i64 -1
     G_BR %bb.1
   bb.1:
     %0(s32) = COPY %w0
     %2(s32) = G_XOR %0, %1
 ...
-