[PATCH] D29988: [X86][AVX512] Change VCVTSS2SD and VCVTSD2SS node types to keep consistency between VEX/EVEX versions.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Please add the new _Int instructions to X86InstrInfo::hasUndefRegUpdate() and the load folding tables.



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Comment at: lib/Target/X86/X86InstrAVX512.td:6059
+
+  defm rrb : AVX512_maskable_fp_scalar<opc, MRMSrcReg, _, (outs _.FRC:$dst),
+                        (ins _.FRC:$src1, _Src.FRC:$src2), OpcodeStr,
----------------
We probably don't need a non-intrinsic rounding mode instruction. Other than the intrinsic there's no way to create a node with the rounding mode


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Comment at: lib/Target/X86/X86InstrAVX512.td:6078
+
+  defm rrb : AVX512_maskable_fp_scalar<opc, MRMSrcReg, _, (outs _.FRC:$dst),
+                        (ins _.FRC:$src1, _Src.FRC:$src2, AVX512RC:$rc), OpcodeStr,
----------------
We probably don't need a non-intrinsic rounding mode instruction. Other than the intrinsic there's no way to create a node with the rounding mode


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Comment at: lib/Target/X86/X86InstrAVX512.td:6131
                      (f32 (fpround (f64 (extractelt VR128X:$src, (iPTR 0))))))))),
-          (VCVTSD2SSZrr VR128X:$dst, VR128X:$src)>,
+          (COPY_TO_REGCLASS (VCVTSD2SSZrr (COPY_TO_REGCLASS VR128X:$dst, FR32X), 
+			                  (COPY_TO_REGCLASS VR128X:$src, FR64X)), 
----------------
Can this use VCVTSD2SSZrr_Int? Is there an equivalent pattern for AVX/SSE? What does it use?


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Comment at: lib/Target/X86/X86InstrAVX512.td:6140
                      (f64 (fpextend (f32 (extractelt VR128X:$src, (iPTR 0))))))))),
-          (VCVTSS2SDZrr VR128X:$dst, VR128X:$src)>,
+          (COPY_TO_REGCLASS (VCVTSS2SDZrr (COPY_TO_REGCLASS VR128X:$dst, FR64X), 
+			                  (COPY_TO_REGCLASS VR128X:$src, FR32X)), 
----------------
Can this use VCVTSS2SDZrr_Int? Is there an equivalent pattern for AVX/SSE? What does it use?


https://reviews.llvm.org/D29988