[llvm] r295755 - AMDGPU: Remove dead declarations from MIR tests

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 21 11:27:36 PST 2017


Author: arsenm
Date: Tue Feb 21 13:27:36 2017
New Revision: 295755

URL: http://llvm.org/viewvc/llvm-project?rev=295755&view=rev
Log:
AMDGPU: Remove dead declarations from MIR tests

Modified:
    llvm/trunk/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir
    llvm/trunk/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir
    llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir

Modified: llvm/trunk/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir?rev=295755&r1=295754&r2=295755&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir Tue Feb 21 13:27:36 2017
@@ -1,4 +1,4 @@
-# RUN: not llc -march=amdgcn -mcpu=SI -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not llc -march=amdgcn -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
 
 --- |
 
@@ -14,21 +14,7 @@
     ret void
   }
 
-  declare { i1, i64 } @llvm.SI.if(i1)
-
-  declare { i1, i64 } @llvm.SI.else(i64)
-
-  declare i64 @llvm.SI.break(i64)
-
-  declare i64 @llvm.SI.if.break(i1, i64)
-
-  declare i64 @llvm.SI.else.break(i64, i64)
-
-  declare i1 @llvm.SI.loop(i64)
-
-  declare void @llvm.SI.end.cf(i64)
-
-  attributes #0 = { "target-cpu"="SI" }
+  attributes #0 = { nounwind }
 
 ...
 ---

Modified: llvm/trunk/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir?rev=295755&r1=295754&r2=295755&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir Tue Feb 21 13:27:36 2017
@@ -1,4 +1,4 @@
-# RUN: not llc -march=amdgcn -mcpu=SI -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
+# RUN: not llc -march=amdgcn -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
 
 --- |
 
@@ -14,21 +14,7 @@
     ret void
   }
 
-  declare { i1, i64 } @llvm.SI.if(i1)
-
-  declare { i1, i64 } @llvm.SI.else(i64)
-
-  declare i64 @llvm.SI.break(i64)
-
-  declare i64 @llvm.SI.if.break(i1, i64)
-
-  declare i64 @llvm.SI.else.break(i64, i64)
-
-  declare i1 @llvm.SI.loop(i64)
-
-  declare void @llvm.SI.end.cf(i64)
-
-  attributes #0 = { "target-cpu"="SI" }
+  attributes #0 = { nounwind }
 
 ...
 ---

Modified: llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir?rev=295755&r1=295754&r2=295755&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir (original)
+++ llvm/trunk/test/CodeGen/MIR/AMDGPU/target-index-operands.mir Tue Feb 21 13:27:36 2017
@@ -22,22 +22,7 @@
     store float %1, float addrspace(1)* %out
     ret void
   }
-
-  declare { i1, i64 } @llvm.SI.if(i1)
-
-  declare { i1, i64 } @llvm.SI.else(i64)
-
-  declare i64 @llvm.SI.break(i64)
-
-  declare i64 @llvm.SI.if.break(i1, i64)
-
-  declare i64 @llvm.SI.else.break(i64, i64)
-
-  declare i1 @llvm.SI.loop(i64)
-
-  declare void @llvm.SI.end.cf(i64)
-
-  attributes #0 = { "target-cpu"="SI" }
+  attributes #0 = { nounwind }
 
 ...
 ---




More information about the llvm-commits mailing list