[PATCH] D30044: [ARM] Enable SMLAL[B|T] instruction selection

[Sam Parker via Phabricator via llvm-commits]

samparker added inline comments.


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Comment at: lib/Target/ARM/ARMISelLowering.cpp:9476
+  }
+  if (SRA.getOperand(0) != Mul)
+    return SDValue();
----------------
t.p.northover wrote:
> samparker wrote:
> > t.p.northover wrote:
> > > What if it's not the same mul as before?
> > Sorry I don't get your point, what I am missing?
> Just knowing that the input to the SRA is **some** multiply operation isn't sufficient. You need to make sure it's the same one that produced the low bits.
Is this not what I have done? I'm checking that the MUL operand of the ADDC is the same operand to the SRA.


https://reviews.llvm.org/D30044