[PATCH] D30044: [ARM] Enable SMLAL[B|T] instruction selection

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

> Tried using ComputeNumSignBits for identifying sign extending, but this didn't work because for the top values we need to perform SRA, but this then appears like a sext and results in the wrong opcodes being selected.

That should just be a matter of performing the checks in the right order, I think; you want to generate some sort of SMLAL if the inputs are sign-extended, but you want to special-case operands which are exactly "sra x, 16" or "SIGN_EXTEND_INREG(x)".


https://reviews.llvm.org/D30044