[PATCH] D30044: [ARM] Enable SMLAL[B|T] instruction selection

Sam Parker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 17 05:19:56 PST 2017


samparker added inline comments.


================
Comment at: test/CodeGen/ARM/longMAC.ll:243
+;CHECK-V6-THUMB2-NOT: sxth
+;CHECK-V6-THUMB2: smlalbb [[RDLO:r[0-9]+]], [[RDHI:r[0-9]+]], [[LHS:r[0-9]+]], [[RHS:r[0-9]+]]
+;CHECK-V6-THUMB2: mov r0, [[RDLO]]
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samparker wrote:
> efriedma wrote:
> > The "CHECK-V6-THUMB2-NOT" aren't that useful; can you instead use CHECK-NEXT to check that there aren't any extra instructions in the function?
> > 
> > You might as well just use explicit register names here; given the calling convention is known, there's only one possible register assignment.
> I will change to explicit registers names, but I would like to keep the extra NOT checks because it caught me when I had originally lowered the operands incorrectly, which left the sxth and shifts in.
Sorry, I now understand your comment! I will make the changes


https://reviews.llvm.org/D30044





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