[llvm] r294527 - [ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not 'this returns'

Hans Wennborg via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 14 11:08:08 PST 2017


Ping?

On Thu, Feb 9, 2017 at 8:57 AM, Hans Wennborg <hans at chromium.org> wrote:
> Sounds good to me if Tim agrees.
>
> Cheers,
> Hans
>
> On Wed, Feb 8, 2017 at 6:17 PM, Arnold Schwaighofer via llvm-commits
> <llvm-commits at lists.llvm.org> wrote:
>> Hi Hans, Tim
>>
>> Can we merged this into the 4.0 branch?
>>
>> This only effects lowering if there is a swiftself attribute — i.e almost zero risk for code that does not use the swift calling convention.
>>
>>
>>> On Feb 8, 2017, at 2:30 PM, Arnold Schwaighofer via llvm-commits <llvm-commits at lists.llvm.org> wrote:
>>>
>>> Author: arnolds
>>> Date: Wed Feb  8 16:30:47 2017
>>> New Revision: 294527
>>>
>>> URL: http://llvm.org/viewvc/llvm-project?rev=294527&view=rev
>>> Log:
>>> [ARM/AArch ISel] SwiftCC: First parameters that are marked swiftself are not 'this returns'
>>>
>>> We mark X0 as preserved by a call that passes the returned parameter.
>>>
>>> x0 = ...
>>> fun(x0) // no implicit def of x0
>>>
>>> This no longer is valid if we pass the parameter in a different register then
>>> the returned value as is the case with a swiftself parameter (passed in x20).
>>>
>>> x20 = ...
>>> fun(x20) // there should be an implict def of x8
>>>
>>> rdar://30425845
>>>
>>> Modified:
>>>    llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
>>>    llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>>>    llvm/trunk/test/CodeGen/AArch64/swiftself.ll
>>>    llvm/trunk/test/CodeGen/ARM/swiftself.ll
>>>
>>> Modified: llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp?rev=294527&r1=294526&r2=294527&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp (original)
>>> +++ llvm/trunk/lib/Target/AArch64/AArch64ISelLowering.cpp Wed Feb  8 16:30:47 2017
>>> @@ -3156,7 +3156,8 @@ AArch64TargetLowering::LowerCall(CallLow
>>>     }
>>>
>>>     if (VA.isRegLoc()) {
>>> -      if (realArgIdx == 0 && Flags.isReturned() && Outs[0].VT == MVT::i64) {
>>> +      if (realArgIdx == 0 && Flags.isReturned() && !Flags.isSwiftSelf() &&
>>> +          Outs[0].VT == MVT::i64) {
>>>         assert(VA.getLocVT() == MVT::i64 &&
>>>                "unexpected calling convention register assignment");
>>>         assert(!Ins.empty() && Ins[0].VT == MVT::i64 &&
>>>
>>> Modified: llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp?rev=294527&r1=294526&r2=294527&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp (original)
>>> +++ llvm/trunk/lib/Target/ARM/ARMISelLowering.cpp Wed Feb  8 16:30:47 2017
>>> @@ -1826,7 +1826,8 @@ ARMTargetLowering::LowerCall(TargetLower
>>>                          StackPtr, MemOpChains, Flags);
>>>       }
>>>     } else if (VA.isRegLoc()) {
>>> -      if (realArgIdx == 0 && Flags.isReturned() && Outs[0].VT == MVT::i32) {
>>> +      if (realArgIdx == 0 && Flags.isReturned() && !Flags.isSwiftSelf() &&
>>> +          Outs[0].VT == MVT::i32) {
>>>         assert(VA.getLocVT() == MVT::i32 &&
>>>                "unexpected calling convention register assignment");
>>>         assert(!Ins.empty() && Ins[0].VT == MVT::i32 &&
>>>
>>> Modified: llvm/trunk/test/CodeGen/AArch64/swiftself.ll
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/swiftself.ll?rev=294527&r1=294526&r2=294527&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/test/CodeGen/AArch64/swiftself.ll (original)
>>> +++ llvm/trunk/test/CodeGen/AArch64/swiftself.ll Wed Feb  8 16:30:47 2017
>>> @@ -65,3 +65,21 @@ define i8* @swiftself_notail(i8* swiftse
>>>   %res = tail call i8* @swiftself_param(i8* swiftself %addr1)
>>>   ret i8* %res
>>> }
>>> +
>>> +; We cannot pretend that 'x0' is alive across the thisreturn_attribute call as
>>> +; we normally would. We marked the first parameter with swiftself which means it
>>> +; will no longer be passed in x0.
>>> +declare swiftcc i8* @thisreturn_attribute(i8* returned swiftself)
>>> +; OPT-LABEL: swiftself_nothisreturn:
>>> +; OPT-DAG: ldr  x20, [x20]
>>> +; OPT-DAG: mov [[CSREG:x[1-9].*]], x8
>>> +; OPT: bl {{_?}}thisreturn_attribute
>>> +; OPT: str x0, {{\[}}[[CSREG]]
>>> +; OPT: ret
>>> +define hidden swiftcc void @swiftself_nothisreturn(i8** noalias nocapture sret, i8** noalias nocapture readonly swiftself) {
>>> +entry:
>>> +  %2 = load i8*, i8** %1, align 8
>>> +  %3 = tail call swiftcc i8* @thisreturn_attribute(i8* swiftself %2)
>>> +  store i8* %3, i8** %0, align 8
>>> +  ret void
>>> +}
>>>
>>> Modified: llvm/trunk/test/CodeGen/ARM/swiftself.ll
>>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/swiftself.ll?rev=294527&r1=294526&r2=294527&view=diff
>>> ==============================================================================
>>> --- llvm/trunk/test/CodeGen/ARM/swiftself.ll (original)
>>> +++ llvm/trunk/test/CodeGen/ARM/swiftself.ll Wed Feb  8 16:30:47 2017
>>> @@ -63,3 +63,20 @@ define i8* @swiftself_notail(i8* swiftse
>>>   %res = tail call i8* @swiftself_param(i8* swiftself %addr1)
>>>   ret i8* %res
>>> }
>>> +
>>> +; We cannot pretend that 'r0' is alive across the thisreturn_attribute call as
>>> +; we normally would. We marked the first parameter with swiftself which means it
>>> +; will no longer be passed in r0.
>>> +declare swiftcc i8* @thisreturn_attribute(i8* returned swiftself)
>>> +; OPT-LABEL: swiftself_nothisreturn:
>>> +; OPT-DAG: mov [[CSREG:r[1-9].*]], r0
>>> +; OPT-DAG: ldr r10, [r10]
>>> +; OPT: bl  {{_?}}thisreturn_attribute
>>> +; OPT: str r0, {{\[}}[[CSREG]]
>>> +define hidden swiftcc void @swiftself_nothisreturn(i8** noalias nocapture sret, i8** noalias nocapture readonly swiftself) {
>>> +entry:
>>> +  %2 = load i8*, i8** %1, align 8
>>> +  %3 = tail call swiftcc i8* @thisreturn_attribute(i8* swiftself %2)
>>> +  store i8* %3, i8** %0, align 8
>>> +  ret void
>>> +}
>>>
>>>
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