[llvm] r294914 - [X86] Fix typo in function name. NFCI.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Sun Feb 12 12:53:44 PST 2017


Author: rksimon
Date: Sun Feb 12 14:53:44 2017
New Revision: 294914

URL: http://llvm.org/viewvc/llvm-project?rev=294914&view=rev
Log:
[X86] Fix typo in function name. NFCI.

convertBitVectorToUnsiged - convertBitVectorToUnsigned

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=294914&r1=294913&r2=294914&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Sun Feb 12 14:53:44 2017
@@ -8189,7 +8189,7 @@ static SDValue getMaskNode(SDValue Mask,
 // Function convertBitVectorToUnsigned - The function gets SmallBitVector
 // as argument and convert him to unsigned.
 // The output of the function is not(zeroable)
-static unsigned convertBitVectorToUnsiged(const SmallBitVector &Zeroable) {
+static unsigned convertBitVectorToUnsigned(const SmallBitVector &Zeroable) {
   unsigned convertBit = 0;
   for (int i = 0, e = Zeroable.size(); i < e; i++)
     convertBit |= !(Zeroable[i]) << i;
@@ -8206,7 +8206,7 @@ static SDValue lowerVectorShuffleToEXPAN
   if (!isNonZeroElementsInOrder(Zeroable, Mask, V1.getValueType(),
                                 IsLeftZeroSide))
     return SDValue();
-  unsigned VEXPANDMask = convertBitVectorToUnsiged(Zeroable);
+  unsigned VEXPANDMask = convertBitVectorToUnsigned(Zeroable);
   MVT IntegerType =
       MVT::getIntegerVT(std::max((int)VT.getVectorNumElements(), 8));
   SDValue MaskNode = DAG.getConstant(VEXPANDMask, DL, IntegerType);




More information about the llvm-commits mailing list