[PATCH] D29712: [globalisel] Decouple src pattern operands from dst pattern operands.

[Daniel Sanders via Phabricator via llvm-commits]

dsanders created this revision.
Herald added subscribers: kristof.beyls, dberris, aemerson.
Herald added a reviewer: javed.absar.

This isn't testable by itself so this patch also adds support for
constant immediates in the pattern and physical register uses in the
result.

The new IntOperandMatcher matches the constant in patterns such as
'(set $rd:GPR32, (G_XOR $rs:GPR32, -1))'. It's always safe to fold
immediates into an instruction so this is the first rule that will match
across multiple BB's.

The Renderer hierarchy is responsible for adding operands to the result
instruction. Renderers can copy operands (CopyRenderer) or add physical
registers (in particular %wzr and %xzr) to the result instruction
in any order (OperandMatchers now import the operand names from
SelectionDAG to allow renderers to access any operand). This allows us to
emit the result instruction for:

  %1 = G_XOR %0, -1 --> %1 = ORNWrr %wzr, %0
  %1 = G_XOR -1, %0 --> %2 = G_XOR %wzr, %0

although the latter is untested since the matcher/importer has not been
taught about commutativity yet.

Added BuildMIAction which can build new instructions and mutate them where
possible. W.r.t the mutation aspect, MatchActions are now told the name of
an instruction they can recycle and BuildMIAction will emit mutation code
when the renderers are appropriate. They are appropriate when all operands
are rendered using CopyRenderer and the indices are the same as the matcher.
This currently assumes that all operands have at least one matcher.

Finally, this change also fixes a crash in
AArch64InstructionSelector::select() caused by an immediate operand
passing isImm() rather than isCImm(). This was uncovered by the other
changes and was detected by existing tests.

Depends on https://reviews.llvm.org/D29711


https://reviews.llvm.org/D29712

Files:
  include/llvm/CodeGen/GlobalISel/InstructionSelector.h
  lib/CodeGen/GlobalISel/InstructionSelect.cpp
  lib/Target/AArch64/AArch64InstructionSelector.cpp
  test/CodeGen/AArch64/GlobalISel/arm64-instructionselect-xor.mir
  test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir
  utils/TableGen/GlobalISelEmitter.cpp

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