[PATCH] D29700: [AMDGPU] Implement register pressure callbacks

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

Typo in commit message "startdard"W



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Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:1509-1510
+  switch (RC->getID()) {
+  default:
+    return AMDGPURegisterInfo::getRegPressureLimit(RC, MF);
+  case AMDGPU::VGPR_32RegClassID:
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Why doesn't this need to handle the tuples of registers?


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Comment at: lib/Target/AMDGPU/SIRegisterInfo.cpp:1513
+    return std::min(getMaxNumVGPRs(Occupancy), getMaxNumVGPRs(MF));
+  case AMDGPU::SGPR_32RegClassID:
+    return std::min(getMaxNumSGPRs(ST, Occupancy, true), getMaxNumSGPRs(MF));
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SGPR register classes are also more complex because of the variants that exclude m0 and add vcc etc. Why don't those need to be handled?


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Comment at: lib/Target/AMDGPU/SIRegisterInfo.h:275
+  unsigned getRegPressureLimit(const TargetRegisterClass *RC,
+                               MachineFunction &MF) const override;
+
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const should be added here instead of using const_cast from the other overload?


Repository:
  rL LLVM

https://reviews.llvm.org/D29700