[llvm] r294288 - Revert "[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)"

[Daniel Jasper via llvm-commits]

Author: djasper
Date: Tue Feb  7 02:57:50 2017
New Revision: 294288

URL: http://llvm.org/viewvc/llvm-project?rev=294288&view=rev
Log:
Revert "[DAGCombiner] (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)"

This reverts commit r294186.

On an internal test, this triggers an out-of-memory error on PPC,
presumably because there is another dagcombine that does the exact
opposite triggering and endless loop consuming more and more memory.

Chandler has started at creating a reduced test case and we'll attach it
as soon as possible.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/adde-carry.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=294288&r1=294287&r2=294288&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Tue Feb  7 02:57:50 2017
@@ -1834,12 +1834,6 @@ SDValue DAGCombiner::visitADDLike(SDValu
     }
   }
 
-  // (add X, (adde Y, 0, Carry)) -> (adde X, Y, Carry)
-  if (N1.getOpcode() == ISD::ADDE && N1->hasOneUse() &&
-      isNullConstant(N1.getOperand(1)))
-    return DAG.getNode(ISD::ADDE, DL, DAG.getVTList(VT, MVT::Glue),
-                       N0, N1->getOperand(0), N1->getOperand(2));
-
   return SDValue();
 }
 

Modified: llvm/trunk/test/CodeGen/X86/adde-carry.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/adde-carry.ll?rev=294288&r1=294287&r2=294288&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/adde-carry.ll (original)
+++ llvm/trunk/test/CodeGen/X86/adde-carry.ll Tue Feb  7 02:57:50 2017
@@ -93,16 +93,17 @@ define %scalar @pr31719(%scalar* nocaptu
 ; CHECK-NEXT:    sbbq %r10, %r10
 ; CHECK-NEXT:    andl $1, %r10d
 ; CHECK-NEXT:    addq 8(%rsi), %rcx
+; CHECK-NEXT:    sbbq %r11, %r11
+; CHECK-NEXT:    andl $1, %r11d
+; CHECK-NEXT:    addq %r10, %rcx
+; CHECK-NEXT:    adcq $0, %r11
+; CHECK-NEXT:    addq 16(%rsi), %r8
 ; CHECK-NEXT:    sbbq %rax, %rax
 ; CHECK-NEXT:    andl $1, %eax
-; CHECK-NEXT:    addq %r10, %rcx
+; CHECK-NEXT:    addq %r11, %r8
 ; CHECK-NEXT:    adcq $0, %rax
-; CHECK-NEXT:    addq 16(%rsi), %r8
-; CHECK-NEXT:    sbbq %r10, %r10
-; CHECK-NEXT:    andl $1, %r10d
 ; CHECK-NEXT:    addq 24(%rsi), %r9
-; CHECK-NEXT:    addq %rax, %r8
-; CHECK-NEXT:    adcq %r10, %r9
+; CHECK-NEXT:    addq %rax, %r9
 ; CHECK-NEXT:    movq %rdx, (%rdi)
 ; CHECK-NEXT:    movq %rcx, 8(%rdi)
 ; CHECK-NEXT:    movq %r8, 16(%rdi)