[PATCH] D29436: RegisterCoalescer: Fix joinReservedPhysReg()

[Wei Mi via llvm-commits]

On Mon, Feb 6, 2017 at 3:19 PM, Wei Mi via Phabricator
<reviews at reviews.llvm.org> wrote:
> wmi added a comment.
>
> Sorry to chime in late.
>
>
>
> ================
> Comment at: test/CodeGen/AArch64/regcoal-physreg.mir:116-123
> +  bb.4:
> +    successors: %bb.1
> +    %0 : gpr64 = ADRP 0
> +    B %bb.1
> +
> +  bb.5:
> +    STRXui %fp, %fp, 0
> ----------------
> If bb.4 has another successor to bb.5, after %0 = ADRP 0 is changed to %fp = ADRP 0, it may change the value of %fp in bb.5. So the original check that the def of physical register has no overlap with the interval of SrcReg is not enough in the case of complex control flow?

found a comment above:
  // The live range of the reserved register will look like a set of dead defs
  // - we don't properly track the live range of reserved registers.

So by checking the live range overlap between %0 and %fp, we may
return no overlap for the testcase below.

>
>   bb.4:
>     successors: %bb.1(0x40000000), %bb.5(0x40000000)
>
>     %fp = COPY %x3
>     %0 : gpr64 = ADRP 0
>     CBZX undef %x0, %bb.5
>     B %bb.1
>
>   bb.5:
>     STRXui %fp, %fp, 0
>     RET_ReallyLR
>
>
>
> Repository:
>   rL LLVM
>
> https://reviews.llvm.org/D29436
>
>
>