# [PATCH] D28522: Codegen: Make chains from lattice-shaped CFGs

Kyle Butt via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 2 22:54:34 PST 2017

```iteratee updated this revision to Diff 86937.

Looking over this, It feels like I can split the lattice portion out and put it in first. Even together they aren't very big, so If I can get some initial opinions on this before I start that, it would be appreciated.

I wanted to lay out lattice-type CFG's correctly even if the blocks are larger than what we would tail-duplicate.
To do that I worked out that for a lattice, we can compute which pair of edges forms the optimal fallthrough and use those edges. We don't really have to worry about CFG breaking, because with a lattice we can easily compute the optimal fallthrough pair and take it.

Lattice:
A Set of Predecessor blocks P that all have the same Successors S when |S| >= 2, |P| >=2 and S ∩ P = ∅
We can treat this as a graph optimization problem. There's a well known general algorithm, (the hungarian algorithm) but I just solved it for size 2 because that's the only size we really care about.

Thanks for taking a look, I'll try and get the plain lattice code separated from the tail duplication code tomorrow.

https://reviews.llvm.org/D28522

Files:
lib/CodeGen/MachineBlockPlacement.cpp
test/CodeGen/AArch64/branch-relax-cbz.ll
test/CodeGen/AArch64/combine-comparisons-by-cse.ll
test/CodeGen/AMDGPU/basic-branch.ll
test/CodeGen/AMDGPU/branch-relaxation.ll
test/CodeGen/AMDGPU/cf-loop-on-constant.ll
test/CodeGen/AMDGPU/convergent-inlineasm.ll
test/CodeGen/AMDGPU/salu-to-valu.ll
test/CodeGen/ARM/2007-05-22-tailmerge-3.ll
test/CodeGen/ARM/atomic-cmpxchg.ll
test/CodeGen/PowerPC/tail-dup-break-cfg.ll
test/CodeGen/PowerPC/tail-dup-layout.ll
test/CodeGen/SPARC/sjlj.ll
test/CodeGen/WebAssembly/mem-intrinsics.ll
test/CodeGen/X86/block-placement.ll
test/CodeGen/X86/bypass-slow-division-32.ll
test/CodeGen/X86/sse1.ll
test/CodeGen/X86/tail-dup-repeat.ll
test/CodeGen/X86/tail-opts.ll