[llvm] r293789 - [ImplicitNullChecks] NFC Fix the implicit-null-checks.mir test

Sanjoy Das via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 1 09:50:41 PST 2017


Author: sanjoy
Date: Wed Feb  1 11:50:40 2017
New Revision: 293789

URL: http://llvm.org/viewvc/llvm-project?rev=293789&view=rev
Log:
[ImplicitNullChecks] NFC Fix the implicit-null-checks.mir test

Summary:
Currently the test implicit-null-checks.mir crashes if we run llc with
-enable-implicit-null-checks -start-before implicit-null-checks
options. Change fixes the RET instruction causing the crash.

Patch by Serguei Katkov!

Reviewers: sanjoy, reames

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29390

Modified:
    llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir

Modified: llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir?rev=293789&r1=293788&r2=293789&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir (original)
+++ llvm/trunk/test/CodeGen/X86/implicit-null-checks.mir Wed Feb  1 11:50:40 2017
@@ -208,15 +208,15 @@ body:             |
 
   bb.2.ret_200:
     %eax = MOV32ri 200
-    RET 0, %eax
+    RETQ %eax
 
   bb.3.is_null:
     %eax = MOV32ri 42
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---
@@ -258,11 +258,11 @@ body:             |
   bb.3.is_null:
     liveins: %eax, %ah, %al, %ax, %bh, %bl, %bp, %bpl, %bx, %eax, %ebp, %ebx, %rax, %rbp, %rbx, %r12, %r13, %r14, %r15, %r12b, %r13b, %r14b, %r15b, %r12d, %r13d, %r14d, %r15d, %r12w, %r13w, %r14w, %r15w
 
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---
@@ -297,15 +297,15 @@ body:             |
 
   bb.2.ret_200:
     %eax = MOV32ri 200
-    RET 0, %eax
+    RETQ %eax
 
   bb.3.is_null:
     %eax = MOV32ri 42
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---
@@ -339,15 +339,15 @@ body:             |
 
   bb.2.ret_200:
     %eax = MOV32ri 200
-    RET 0, %eax
+    RETQ %eax
 
   bb.3.is_null:
     %eax = MOV32ri 42
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---
@@ -382,15 +382,15 @@ body:             |
 
   bb.2.ret_200:
     %eax = MOV32ri 200
-    RET 0, %eax
+    RETQ %eax
 
   bb.3.is_null:
     %eax = MOV32ri 42
-    RET 0, %eax
+    RETQ %eax
 
   bb.4.ret_100:
     %eax = MOV32ri 100
-    RET 0, %eax
+    RETQ %eax
 
 ...
 ---




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