[PATCH] D26855: New unsafe-fp-math implementation for X86 target

Guy Blank via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 1 01:29:06 PST 2017


guyblank added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:15331
+  case Triple::x86_64:
+    return SDValue();
+  }
----------------
avt77 wrote:
> guyblank wrote:
> > sorry for joining the discussion so late.
> > 
> > IIUC this affects all X86 CPUs, but I didn't see handling for all possible types (as stated in a TODO below).
> > 
> > specifically, does this affect AVX-512 code?
> At the moment we support only limited set of types (see X86InstrInfo::genAlternativeCodeSequence below) but we are ready to extend it if it is necessary.
you support the machine combiner approach for a limited set of types/instructions, but you've disabled the DAG combine approach for **ALL ** types/instructions.

I ran CodeGen/X86/recip-fastmath.ll on knl with your changes.
the output for @f32_one_step (for example) changed from 

vrcp14ss    %xmm0, %xmm0, %xmm1
vfnmadd213ss    .LCPI1_0(%rip), %xmm1, %xmm0
vfmadd132ss %xmm1, %xmm1, %xmm0

to
vmovss  .LCPI1_0(%rip), %xmm1
vdivss  %xmm0, %xmm1, %xmm0




https://reviews.llvm.org/D26855





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