[PATCH] D27586: AMDGPU/SI: Add llvm.amdgcn.s.buffer.load intrinsic

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: lib/Target/AMDGPU/AMDGPU.h:172
 
+  CONSTANT_ADDRESS_W_RSRC = 42,
   // Some places use this if the address space can't be determined.
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Why 42?


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Comment at: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp:167
   // flat.
-  return "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"
+  return "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p42:128:128"
          "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"
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Does this need to specify non-integral? Also there are a handful of places that assume 64-bit max we should take care of


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Comment at: lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp:87
   case AMDGPUAS::CONSTANT_ADDRESS:
+  case AMDGPUAS::CONSTANT_ADDRESS_W_RSRC:
   case AMDGPUAS::FLAT_ADDRESS:
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This should be last


https://reviews.llvm.org/D27586