[www] r293659 - Add schedule for LLVM workshop at CGO
Tobias Edler von Koch via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 31 09:58:17 PST 2017
Author: tobiasvk
Date: Tue Jan 31 11:58:17 2017
New Revision: 293659
URL: http://llvm.org/viewvc/llvm-project?rev=293659&view=rev
Log:
Add schedule for LLVM workshop at CGO
Modified:
www/trunk/devmtg/2017-02-04/index.html
Modified: www/trunk/devmtg/2017-02-04/index.html
URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2017-02-04/index.html?rev=293659&r1=293658&r2=293659&view=diff
==============================================================================
--- www/trunk/devmtg/2017-02-04/index.html (original)
+++ www/trunk/devmtg/2017-02-04/index.html Tue Jan 31 11:58:17 2017
@@ -17,26 +17,141 @@
<div class="www_sectiontitle">Program</div>
<p>
- The following presentations have been accepted for the LLVM Performance Workshop:
- <ul>
- <li> <b>Krzysztof Parzyszek</b>: Register Data Flow framework </li>
- <li> <b>Tao Schardl and William Moses</b>: The Tapir Extension to LLVM's Intermediate Representation for Fork-Join Parallelism</li>
- <li> <b>Aditya Kumar, Sebastian Pop and Laxman Sole</b>: Performance analysis of libcxx</li>
- <li> <b>Hal Finkel</b>: Modeling restrict-qualified pointers in LLVM</li>
- <li> <b>Mehdi Amini</b>: LTO/ThinLTO Bof</li>
- <li> <b>Johannes Doerfert</b>: Polyhedral "Driven" Optimizations on Real Codes</li>
- <li> <b>Tobias Grosser</b>: Polly-ACC - Accelerator support with Polly-ACC</li>
- <li> <b>Brian Railing</b>: Improving LLVM Instrumentation Overheads</li>
- <li> <b>Evandro Menezes, Sebastian Pop and Aditya Kumar</b>: Efficient clustering of case statements for indirect branch predictors</li>
- <li> <b>Pranav Bhandarkar, Anshuman Dasgupta, Ron Lieberman, Dan Palermo, Dillon Sharlet and Andrew Adams</b>: Halide for Hexagon⢠DSP with Hexagon Vector eXtensions (HVX) using LLVM</li>
- <li> <b>Sergei Larin and Harsha Jagasia</b>: Impact of the current LLVM inlining strategy on complex embedded application memory utilization and performance</li>
- </ul>
+The workshop takes place at the <a href="http://cgo.org/cgo2017/travel-information.html">Hilton Hotel</a> in
+downtown Austin (500 East 4th St).
+</p>
+<p>
+ <table border="1">
+ <tr><th>Time</th> <th>Room</th> <th>Speaker</th> <th>Title</th> <th> </th></tr>
+ <tr>
+ <td>7:30-8:30</td>
+ <td>616AB</td>
+ <td colspan=3>Breakfast</td>
+ </tr>
+ <tr>
+ <td> </td>
+ <td> </td>
+ <td colspan=3><b>Session 1: Parallel Code Generation</b></td>
+ </tr>
+ <tr>
+ <td>8:30am</td>
+ <td>400/402</td>
+ <td>Johannes Doerfert (Saarland University)</td>
+ <td>Polyhedral "Driven" Optimizations on Real Codes</td>
+ <td><a href="#doerfert">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>9:00am</td>
+ <td>400/402</td>
+ <td>Tobias Grosser (ETH Zurich)</td>
+ <td>Polly-ACC - Accelerator support with Polly-ACC</td>
+ <td><a href="#grosser">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>9:30am</td>
+ <td>400/402</td>
+ <td>Tao Schardl and William Moses (MIT)</td>
+ <td>The Tapir Extension to LLVM's Intermediate Representation for Fork-Join Parallelism</td>
+ <td><a href="#schardl">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>10:00-10:30</td>
+ <td>616AB</td>
+ <td colspan=3>Break</td>
+ </tr>
+ <tr>
+ <td> </td>
+ <td> </td>
+ <td colspan=3><b>Session 2: Performance in Libraries and Languages</b></td>
+ </tr>
+ <tr>
+ <td>10:30am</td>
+ <td>400/402</td>
+ <td>Hal Finkel (Argonne National Laboratory)</td>
+ <td>Modeling restrict-qualified pointers in LLVM</td>
+ <td><a href="#finkel">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>11am</td>
+ <td>400/402</td>
+ <td>Pranav Bhandarkar, Anshuman Dasgupta, Ron Lieberman, Dan Palermo (Qualcomm Innovation Center) Dillon Sharlet and Andrew Adams (Google)</td>
+ <td>Halide for Hexagon DSP with Hexagon Vector eXtensions (HVX) using LLVM</td>
+ <td><a href="#bhandarkar">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>11:30am</td>
+ <td>400/402</td>
+ <td>Aditya Kumar, Sebastian Pop and Laxman Sole (Samsung Austin R&D Center)</td>
+ <td>Performance analysis of libcxx</td>
+ <td><a href="#kumar">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>12:00-1:30</td>
+ <td> </td>
+ <td colspan=3>Lunch</td>
+ </tr>
+ <tr>
+ <td> </td>
+ <td> </td>
+ <td colspan=3><b>Session 3: Whole-application performance tuning</b></td>
+ </tr>
+ <tr>
+ <td>1:30pm</td>
+ <td>400/402</td>
+ <td>Brian Railing (CMU)</td>
+ <td>Improving LLVM Instrumentation Overheads</td>
+ <td><a href="#railing">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>2pm</td>
+ <td>400/402</td>
+ <td>Sergei Larin, Harsha Jagasia and Tobias Edler von Koch (Qualcomm Innovation Center)</td>
+ <td>Impact of the current LLVM inlining strategy on complex embedded application memory utilization and performance</td>
+ <td><a href="#larin">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>2:30pm</td>
+ <td>400/402</td>
+ <td>Mehdi Amini (Apple)</td>
+ <td>LTO/ThinLTO BoF</td>
+ <td><a href="#amini">[Abstract]</a></td>
+ </tr>
+ <tr>
+ <td>3:00-3:30</td>
+ <td>616AB</td>
+ <td colspan=3>Break</td>
+ </tr>
+ <tr>
+ <td> </td>
+ <td> </td>
+ <td colspan=3><b>Session 4: Backend optimizations</b></td>
+ </tr>
+ <tr>
+ <td>3:30pm</td>
+ <td>400/402</td>
+ <td>Krzysztof Parzyszek (Qualcomm Innovation Center)</td>
+ <td>Register Data Flow framework</td>
+ <td><a href="#krzy">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>4pm</td>
+ <td>400/402</td>
+ <td>Evandro Menezes, Sebastian Pop and Aditya Kumar (Samsung Austin R&D Center)</td>
+ <td>Efficient clustering of case statements for indirect branch predictors</td>
+ <td><a href="#menezes">[Abstract]</a> [Slides]</td>
+ </tr>
+ <tr>
+ <td>4:30pm</td>
+ <td> </td>
+ <td colspan=3>Workshop ends.</td>
+ </tr>
+ </table>
</p>
<div class="www_sectiontitle">Abstracts</div>
<p>
<ul>
- <li> <b>Krzysztof Parzyszek</b>: Register Data Flow framework
+ <li> <a id="krzy"><b>Krzysztof Parzyszek</b>: Register Data Flow framework</a>
<p>
Register Data Flow is a framework implemented in LLVM that enables
data-flow optimizations on machine IR after register allocation. While
@@ -65,7 +180,7 @@
an overview of RDF and its use in the Hexagon backend.
</p>
</li>
- <li> <b>Tao Schardl and William Moses</b>: The Tapir Extension to LLVM's Intermediate Representation for Fork-Join Parallelism
+ <li> <a id="schardl"><b>Tao Schardl and William Moses</b>: The Tapir Extension to LLVM's Intermediate Representation for Fork-Join Parallelism</a>
<p>
This talk explores how fork-join parallelism, as supported by
dynamic-multithreading concurrency platforms such as Cilk and
@@ -98,7 +213,7 @@
of implementing Tapir in LLVM.
</p>
</li>
- <li> <b>Aditya Kumar, Sebastian Pop, and Laxman Sole</b>: Performance analysis of libcxx
+ <li> <a id="kumar"><b>Aditya Kumar, Sebastian Pop, and Laxman Sole</b>: Performance analysis of libcxx</a>
<p>
We will discuss the improvements and future work on libcxx. This
includes the improvements on standard library algorithms like
@@ -111,9 +226,9 @@
vs. gcc-libstdc++ on representative benchmarks. Finally we will talk
about our contributions to google-benchmark, which comes with libc++, to
help keep track of performance regressions.
- </p>
+ </p>
</li>
- <li> <b>Hal Finkel</b>: Modeling restrict-qualified pointers in LLVM
+ <li> <a id="finkel"><b>Hal Finkel</b>: Modeling restrict-qualified pointers in LLVM</a>
<p>
It is not always possible for a compiler to statically determine enough
about the pointer-aliasing properties of a program, especially for
@@ -152,9 +267,9 @@
assumptions).
</p>
</li>
- <li> <b>Mehdi Amini</b>: LTO/ThinLTO Bof
+ <li> <a id="amini"><b>Mehdi Amini</b>: LTO/ThinLTO BoF</a>
<p>
- LTO is an important techniques for getting the maximum performance from
+ LTO is an important technique for getting the maximum performance from
the compiler. We presented the ThinLTO model and implementation in LLVM
at the last LLVM Dev Meeting. This provided the audience with a good
overview of the high-level flow of ThinLTO and the 3-phases split
@@ -167,7 +282,7 @@
optimizations currently in development upstream.
</p>
</li>
- <li> <b>Johannes Doerfert</b>: Polyhedral "Driven" Optimizations on Real Codes
+ <li> <a id="doerfert"><b>Johannes Doerfert</b>: Polyhedral "Driven" Optimizations on Real Codes</a>
<p>In this talk I will present polyhedral "driven" optimizations on real
codes. The term polyhedral "driven" is used as there are two flavors of
optimization I want to discuss (depending on my progress and the
@@ -194,7 +309,7 @@
a simpler form, present in LLVM.
</p>
</li>
- <li> <b>Tobias Grosser</b>: Polly-ACC - Accelerator support with Polly-ACC
+ <li> <a id="grosser"><b>Tobias Grosser</b>: Polly-ACC - Accelerator support with Polly-ACC</a>
<p>
Programming today's increasingly complex heterogeneous hardware is
difficult, as it commonly requires the use of data-parallel languages,
@@ -212,7 +327,7 @@
to investigate algorithmic changes.
</p>
</li>
- <li> <b>Brian Railing</b>: Improving LLVM Instrumentation Overheads
+ <li> <a id="railing"><b>Brian Railing</b>: Improving LLVM Instrumentation Overheads</a>
<p>
The behavior and structure of a shared-memory parallel program can be
characterized by a task graph that encodes the instructions, memory
@@ -256,7 +371,7 @@
ACM, 2013, pp. 235-246.
</p>
</li>
- <li> <b>Evandro Menezes, Sebastian Pop, and Aditya Kumar</b>: Efficient clustering of case statements for indirect branch predictors
+ <li> <a id="menezes"><b>Evandro Menezes, Sebastian Pop, and Aditya Kumar</b>: Efficient clustering of case statements for indirect branch predictors</a>
<p>
We present an O(nlogn) algorithm as implemented in LLVM to compile a
switch statement into jump tables. To generate jump tables that can be
@@ -268,7 +383,7 @@
running several benchmarks.
</p>
</li>
- <li> <b>Pranav Bhandarkar, Anshuman Dasgupta, Ron Lieberman, Dan Palermo, Dillon Sharlet, and Andrew Adams</b>: Halide for Hexagon⢠DSP with Hexagon Vector eXtensions (HVX) using LLVM
+ <li> <a id="bhandarkar"><b>Pranav Bhandarkar, Anshuman Dasgupta, Ron Lieberman, Dan Palermo, Dillon Sharlet, and Andrew Adams</b>: Halide for Hexagon DSP with Hexagon Vector eXtensions (HVX) using LLVM</a>
<p>
Halide is a domain specific language that endeavors to make it easier to
construct large and composite image processing applications. Halide is
@@ -288,7 +403,7 @@
</p>
<p>
In this workshop, we will present our work on retargeting Halide to the
- Hexagon⢠DSP with focus on the Hexagon⢠Vector eXtensions (HVX).
+ Hexagon DSP with focus on the Hexagon Vector eXtensions (HVX).
</p>
<p>
Our workshop will present the halide constructs used in a simple blur
@@ -302,7 +417,7 @@
the various improvements which can be realized with scheduling changes.
</p>
</li>
- <li> <b>Sergei Larin and Harsha Jagasia</b>: Impact of the current LLVM inlining strategy on complex embedded application memory utilization and performance
+ <li> <a id="larin"><b>Sergei Larin, Harsha Jagasia and Tobias Edler von Koch</b>: Impact of the current LLVM inlining strategy on complex embedded application memory utilization and performance</a>
<p>
Sophisticated embedded applications with extensive and fine degree of
memory management are presenting a unique challenge to contemporary tool
@@ -394,12 +509,6 @@
Tanya Lattner.
</p>
-<div class="www_sectiontitle">Schedule</div>
-
-<p>
-To be announced.
-</p>
-
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