[PATCH] D29283: [ARM] Avoid using ARM instructions in Thumb mode
Renato Golin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 31 04:18:56 PST 2017
rengolin added a comment.
In https://reviews.llvm.org/D29283#661489, @samparker wrote:
> Yes, I will look into the v7VE issue;
Just to be clear, this can surely be for another patch. For this patch, just the additional tests on Thumb2 should do it.
> however, I'm not sure how using an InstAlias would be possible since the operation of SWP and LDREX/STREX pair seems different to my understanding. The STREX returns a store success flag while SWP can atomically swap the value between a register and a memory location. Am I misunderstanding the use of these instructions?
They are different in syntax, yes, but being optional means we can't generate SWPs for v7VE. We already generate LDREX/STREX pairs, so I think it should be fine, and this change won't make it more likely to be generated in any way, so this is not impacting this patch.
This is just something to have in mind to do. Maybe a FIXME comment in the code would help.
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