[PATCH] D29261: [X86][GlobalISel] Add limited ret lowering support to the IRTranslator.

[Diana Picus via Phabricator via llvm-commits]

rovka added inline comments.


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Comment at: lib/Target/X86/X86CallLowering.cpp:38
 
+void X86CallLowering::splitToValueTypes(const ArgInfo &OrigArg,
+                                        SmallVectorImpl<ArgInfo> &SplitArgs,
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I was wondering if it's possible to use just one of these for all backends.

In particular, I see you need to split values based on TLI.getNumRegisters/getRegisterType. I was looking into that myself for the ARM port. For ARM, I think it would be enough to extract the function from AArch64 and then add this splitting logic in the loop on the SplitVTs (and also not exit if we only have one VT - I think that doesn't do the right thing for AArch64 either if we have i128 arguments). Some generalization in the handling of bit offsets would be needed too, but that probably wouldn't be too exotic.

Would something like that work for x86 as well? I see that in the arg handling in SelectionDAG there are some special cases for some x86 calling conventions (vector call, intr) and obviously we don't want to special-case in the common code anymore. Do you see any way in which we could share some of this code across all backends, without doing anything awkward? Like I said, ARM and AArch64 are pretty similar, so some x86 perspective would definitely help here :)


Repository:
  rL LLVM

https://reviews.llvm.org/D29261