[PATCH] D29235: [X86] Added INT1 instruction and fixed register usage.

Chris Ray via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 30 19:58:46 PST 2017


cray added inline comments.


================
Comment at: lib/Target/X86/X86InstrSystem.td:35
+// Interrupt and SysCall Instructions.
+let Uses = [ESP, EFLAGS], Defs = [ESP, EFLAGS] in {
+  def INTO : I<0xce, RawFrm, (outs), (ins), "into", []>;
----------------
cray wrote:
> craig.topper wrote:
> > The instructions don't really modify ESP or EFLAGS. I would expect them to be restored when the interrupt handler returned. So from the perspective of the code with the INT insturction they aren't changed.
> The flags are pushed onto the stack, and if the INT causes an exception they will not be popped from the stack when the exception handler is called.  
> I can put together an example of this if you would like.
I explained that poorly in my previous comment. The following is taken from the intel manual:


> Flags Affected
> The EFLAGS register is pushed onto the stack. The IF, TF, NT, AC, RF, and VM flags may be cleared, depending on
> the mode of operation of the processor when the INT instruction is executed (see the “Operation” section). If the
> interrupt uses a task gate, any flags may be set or cleared, controlled by the EFLAGS image in the new task’s TSS.


Also, in the case of windows SEH, the stack should be unwound, but the flags will not be restored. 


Repository:
  rL LLVM

https://reviews.llvm.org/D29235





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