[PATCH] D10533: [AArch64][ARM] Match interleaved memory accesses into ldN/stN/vldN/vstN intrinsics.
Matthias Braun via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 30 12:56:54 PST 2017
MatzeB added a comment.
Is there a reason this was implemented as an IR pass and not at the SelectionDAG level?
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