[PATCH] D29214: [AMDGPU] Internalize non-kernel symbols

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 27 09:00:39 PST 2017


rampitec updated this revision to Diff 86060.
rampitec added a comment.
Herald added a subscriber: tpr.

Rebased to master and merged.
Added full context diff.


Repository:
  rL LLVM

https://reviews.llvm.org/D29214

Files:
  lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  test/CodeGen/AMDGPU/internalize.ll


Index: test/CodeGen/AMDGPU/internalize.ll
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/internalize.ll
@@ -0,0 +1,35 @@
+; RUN: opt -O1 -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-whole-program < %s | FileCheck %s
+; CHECK-NOT: unused
+; CHECK-NOT: foo_used
+; CHECK: gvar_used
+; CHECK: main_kernel
+
+ at gvar_unused = addrspace(1) global i32 undef, align 4
+ at gvar_used = addrspace(1) global i32 undef, align 4
+
+; Function Attrs: alwaysinline nounwind
+define void @foo_unused(i32 addrspace(1)* %out) local_unnamed_addr #1 {
+entry:
+  store i32 1, i32 addrspace(1)* %out
+  ret void
+}
+
+; Function Attrs: alwaysinline nounwind
+define void @foo_used(i32 addrspace(1)* %out, i32 %tid) local_unnamed_addr #1 {
+entry:
+  store i32 %tid, i32 addrspace(1)* %out
+  ret void
+}
+
+define amdgpu_kernel void @main_kernel() {
+entry:
+  %tid = call i32 @llvm.amdgcn.workitem.id.x()
+  tail call void @foo_used(i32 addrspace(1)* @gvar_used, i32 %tid) nounwind
+  ret void
+}
+
+declare i32 @llvm.amdgcn.workitem.id.x() #0
+
+attributes #0 = { nounwind readnone }
+
+attributes #1 = { alwaysinline nounwind }
Index: lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -84,6 +84,13 @@
   cl::init(false),
   cl::Hidden);
 
+// Option to enable whole program mode
+static cl::opt<bool> WholeProgram(
+  "amdgpu-whole-program",
+  cl::desc("Enable whole program mode"),
+  cl::init(false),
+  cl::Hidden);
+
 extern "C" void LLVMInitializeAMDGPUTarget() {
   // Register the target
   RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget());
@@ -207,11 +214,33 @@
 }
 
 void AMDGPUTargetMachine::adjustPassManager(PassManagerBuilder &Builder) {
+  bool Whole = WholeProgram && (getTargetTriple().getArch() == Triple::amdgcn);
   Builder.addExtension(
     PassManagerBuilder::EP_ModuleOptimizerEarly,
-    [&](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
+    [Whole](const PassManagerBuilder &Builder, legacy::PassManagerBase &PM) {
       PM.add(createAMDGPUUnifyMetadataPass());
-    });
+      if (Builder.OptLevel > 0 && Whole) {
+        PM.add(createInternalizePass([=](const GlobalValue &GV) -> bool {
+          if (const Function *F = dyn_cast<Function>(&GV)) {
+            if (F->isDeclaration())
+                return true;
+            switch (F->getCallingConv()) {
+            default:
+              return false;
+            case CallingConv::AMDGPU_VS:
+            case CallingConv::AMDGPU_GS:
+            case CallingConv::AMDGPU_PS:
+            case CallingConv::AMDGPU_CS:
+            case CallingConv::AMDGPU_KERNEL:
+            case CallingConv::SPIR_KERNEL:
+              return true;
+            }
+          }
+          return !GV.use_empty();
+        }));
+        PM.add(createGlobalDCEPass());
+      }
+  });
 }
 
 //===----------------------------------------------------------------------===//


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