[PATCH] D29133: [PowerPC][Altivec] Add some extended mnemonics

Hal Finkel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 26 06:19:04 PST 2017


hfinkel added a comment.

In https://reviews.llvm.org/D29133#656541, @brunoalr wrote:

> mfvrd with VR registers is an alias to mfvsrd with VSR registers.
>
> Patch by nemanjai


Why did you fold these together? Can we just do the vor -> vmr alias, and then worry about the mfvrd change separately? The vor -> vmr LGTM, so if you can pull these apart, please commit that part.



================
Comment at: lib/Target/PowerPC/PPCInstrVSX.td:1450
+// be emitted with a VSX reg. So leave Emit = 0 here.
+def : InstAlias<"mfvrd $rA, $XT",
+                (MFVRD g8rc:$rA, vrrc:$XT), 0>;
----------------
nemanjai wrote:
> @hfinkel Do you think this is an acceptable way to get this support implemented? Or do you have a preferred suggestion? Maybe some custom handling of the register operand (or even the mnemonic itself) in the Asm parser/printer or something along those lines...
> 
> Once we decide how we want to approach this, we can add a test case.
One of these should be mfvsrd?


Repository:
  rL LLVM

https://reviews.llvm.org/D29133





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