[PATCH] D29048: [RegisterCoalescer] Do not call LiveIntervals::getInstructionIndex with a DBG_VALUE

Brendon Cahoon via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 23 14:05:29 PST 2017


bcahoon created this revision.
Herald added a subscriber: aemerson.

An assert occurs due to calling getInstructionIndex with a DBG_VALUE instruction because the DBG_VALUE instruction does not have a Slot Index.  This occurs in updateRegDefUses.

I'm not sure if this is the correct fix, but there are other places where the call to getInstructionIndex is guarded by a check for DBG_VALUE.

I don't have a reproducible test case because the code that causes the crash is not in-tree. Also, I haven't had any luck reproducing the crash with in-tree code. I tried to generate a test case for ARM because it has composed SubRegs, but I was unsuccessful.

The error occurs, on Hexagon, when introducing a new register class that represents 4 vector registers.  The MIR prior to joining the intervals looks like the code below. In the example, the wsub_lo SubReg contains a vsub_hi and vsub_lo register.

  %vreg2<def> = load
  DBG_VALUE %vreg2, %noreg, !"a",
  %vreg4:vsub_lo<def,read-undef> = COPY %vreg2
  %vreg6:wsub_lo<def,read-undef> = COPY %vreg4
  %vreg6:wsub_hi<def> = COPY %vreg4

After %vreg2 and %vreg4:vsub_lo are coalesced:
...

  %vreg4:vsub_lo<def,read-undef> = load
  DBG_VALUE %vreg4:vsub_lo<undef>, %noreg, !"a",
  %vreg6:wsub_lo<def,read-undef> = COPY %vreg4
  %vreg6:wsub_hi<def> = COPY %vreg4

...

The DBG_VALUE that has a sub register results in the call to getInstructionIndex and the assert.


https://reviews.llvm.org/D29048

Files:
  lib/CodeGen/RegisterCoalescer.cpp


Index: lib/CodeGen/RegisterCoalescer.cpp
===================================================================
--- lib/CodeGen/RegisterCoalescer.cpp
+++ lib/CodeGen/RegisterCoalescer.cpp
@@ -1455,7 +1455,7 @@
 
     // If SrcReg wasn't read, it may still be the case that DstReg is live-in
     // because SrcReg is a sub-register.
-    if (DstInt && !Reads && SubIdx)
+    if (DstInt && !Reads && SubIdx && !UseMI->isDebugValue())
       Reads = DstInt->liveAt(LIS->getInstructionIndex(*UseMI));
 
     // Replace SrcReg with DstReg in all UseMI operands.


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