[PATCH] D28988: [X86]Enable the use of 'mov' with a 64bit GPR and a large immediate

[coby via Phabricator via llvm-commits]

coby created this revision.

Enable the next form (intel style):
"mov <reg64>, <largeImm>"
which is should be available,
where <largeImm> stands for immediates which exceed the range of a singed 32bit integer


Repository:
  rL LLVM

https://reviews.llvm.org/D28988

Files:
  lib/Target/X86/X86InstrInfo.td
  test/MC/X86/intel-syntax.s


Index: lib/Target/X86/X86InstrInfo.td
===================================================================
--- lib/Target/X86/X86InstrInfo.td
+++ lib/Target/X86/X86InstrInfo.td
@@ -2984,7 +2984,7 @@
 def : InstAlias<"mov\t{$seg, $mem|$mem, $seg}", (MOV32ms i32mem:$mem, SEGMENT_REG:$seg), 0>;
 
 // Match 'movq <largeimm>, <reg>' as an alias for movabsq.
-def : InstAlias<"movq\t{$imm, $reg|$reg, $imm}", (MOV64ri GR64:$reg, i64imm:$imm), 0>;
+def : InstAlias<"mov{q}\t{$imm, $reg|$reg, $imm}", (MOV64ri GR64:$reg, i64imm:$imm), 0>;
 
 // Match 'movq GR64, MMX' as an alias for movd.
 def : InstAlias<"movq\t{$src, $dst|$dst, $src}",
Index: test/MC/X86/intel-syntax.s
===================================================================
--- test/MC/X86/intel-syntax.s
+++ test/MC/X86/intel-syntax.s
@@ -19,6 +19,8 @@
 	mov	EAX, DWORD PTR [RSP - 4]
 // CHECK:	movq    (%rsp), %rax
 	mov     RAX, QWORD PTR [RSP]
+// CHECK: movabsq $4294967289, %rax
+  mov     RAX, 4294967289
 // CHECK:	movl	$-4, -4(%rsp)
 	mov	DWORD PTR [RSP - 4], -4
 // CHECK:	movq	0, %rcx


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