[llvm] r292563 - [AArch64][GlobalISel] Widen scalar int->fp conversions.

[Ahmed Bougacha via llvm-commits]

Author: ab
Date: Thu Jan 19 19:37:24 2017
New Revision: 292563

URL: http://llvm.org/viewvc/llvm-project?rev=292563&view=rev
Log:
[AArch64][GlobalISel] Widen scalar int->fp conversions.

It's incorrect to ignore the higher bits of the integer source.
Teach the legalizer how to widen it.

Modified:
    llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp
    llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir

Modified: llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp?rev=292563&r1=292562&r2=292563&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (original)
+++ llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp Thu Jan 19 19:37:24 2017
@@ -273,6 +273,28 @@ LegalizerHelper::widenScalar(MachineInst
     MI.eraseFromParent();
     return Legalized;
   }
+  case TargetOpcode::G_SITOFP:
+  case TargetOpcode::G_UITOFP: {
+    if (TypeIdx != 1)
+      return UnableToLegalize;
+
+    unsigned Src = MI.getOperand(1).getReg();
+    unsigned SrcExt = MRI.createGenericVirtualRegister(WideTy);
+
+    if (MI.getOpcode() == TargetOpcode::G_SITOFP) {
+      MIRBuilder.buildSExt(SrcExt, Src);
+    } else {
+      assert(MI.getOpcode() == TargetOpcode::G_UITOFP && "Unexpected conv op");
+      MIRBuilder.buildZExt(SrcExt, Src);
+    }
+
+    MIRBuilder.buildInstr(MI.getOpcode())
+        .addDef(MI.getOperand(0).getReg())
+        .addUse(SrcExt);
+
+    MI.eraseFromParent();
+    return Legalized;
+  }
   case TargetOpcode::G_LOAD: {
     assert(alignTo(MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(), 8) ==
                WideTy.getSizeInBits() &&

Modified: llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp?rev=292563&r1=292562&r2=292563&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AArch64/AArch64LegalizerInfo.cpp Thu Jan 19 19:37:24 2017
@@ -141,12 +141,18 @@ AArch64LegalizerInfo::AArch64LegalizerIn
     setAction({G_TRUNC, 1, Ty}, Legal);
 
   // Conversions
-  for (auto Ty : { s1, s8, s16, s32, s64 }) {
+  for (auto Ty : { s32, s64 }) {
     setAction({G_FPTOSI, 0, Ty}, Legal);
     setAction({G_FPTOUI, 0, Ty}, Legal);
     setAction({G_SITOFP, 1, Ty}, Legal);
     setAction({G_UITOFP, 1, Ty}, Legal);
   }
+  for (auto Ty : { s1, s8, s16 }) {
+    setAction({G_FPTOSI, 0, Ty}, Legal);
+    setAction({G_FPTOUI, 0, Ty}, Legal);
+    setAction({G_SITOFP, 1, Ty}, WidenScalar);
+    setAction({G_UITOFP, 1, Ty}, WidenScalar);
+  }
 
   for (auto Ty : { s32, s64 }) {
     setAction({G_FPTOSI, 1, Ty}, Legal);

Modified: llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir?rev=292563&r1=292562&r2=292563&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir (original)
+++ llvm/trunk/test/CodeGen/AArch64/GlobalISel/legalize-itofp.mir Thu Jan 19 19:37:24 2017
@@ -130,7 +130,8 @@ body: |
     %1:_(s1) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_sitofp_s32_s1
-    ; CHECK: %2(s32) = G_SITOFP %1
+    ; CHECK: %3(s32) = G_SEXT %1
+    ; CHECK: %2(s32) = G_SITOFP %3
     %2:_(s32) = G_SITOFP %1
 ...
 
@@ -143,7 +144,8 @@ body: |
     %1:_(s1) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_uitofp_s32_s1
-    ; CHECK: %2(s32) = G_UITOFP %1
+    ; CHECK: %3(s32) = G_ZEXT %1
+    ; CHECK: %2(s32) = G_UITOFP %3
     %2:_(s32) = G_UITOFP %1
 ...
 
@@ -156,7 +158,8 @@ body: |
     %1:_(s8) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_sitofp_s64_s8
-    ; CHECK: %2(s64) = G_SITOFP %1
+    ; CHECK: %3(s32) = G_SEXT %1
+    ; CHECK: %2(s64) = G_SITOFP %3
     %2:_(s64) = G_SITOFP %1
 ...
 
@@ -169,7 +172,8 @@ body: |
     %1:_(s8) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_uitofp_s64_s8
-    ; CHECK: %2(s64) = G_UITOFP %1
+    ; CHECK: %3(s32) = G_ZEXT %1
+    ; CHECK: %2(s64) = G_UITOFP %3
     %2:_(s64) = G_UITOFP %1
 ...
 
@@ -182,7 +186,8 @@ body: |
     %1:_(s16) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_sitofp_s32_s16
-    ; CHECK: %2(s32) = G_SITOFP %1
+    ; CHECK: %3(s32) = G_SEXT %1
+    ; CHECK: %2(s32) = G_SITOFP %3
     %2:_(s32) = G_SITOFP %1
 ...
 
@@ -195,6 +200,7 @@ body: |
     %1:_(s16) = G_TRUNC %0
 
     ; CHECK-LABEL: name: test_uitofp_s32_s16
-    ; CHECK: %2(s32) = G_UITOFP %1
+    ; CHECK: %3(s32) = G_ZEXT %1
+    ; CHECK: %2(s32) = G_UITOFP %3
     %2:_(s32) = G_UITOFP %1
 ...