[PATCH] D27803: [ARM] GlobalISel: Load i1, i8 and i16 args from stack

Diana Picus via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 19 12:27:35 PST 2017


rovka updated this revision to Diff 85007.
rovka edited the summary of this revision.
rovka added a comment.
Herald added a subscriber: kristof.beyls.

I've been thinking about this a bit more and I think it's better to generate a G_LOAD, but for a size of 4 so that we preserve the extension performed by the caller.
This is achieved by changing the type of the virtual register that we're supposed to load into to a 32-bit scalar (which is sufficient for now, since we only support scalars at the moment). I've also fixed the size of the memory operand, which was wrong in the previous versions of the patch.
Let me know what you think.
Thanks.


https://reviews.llvm.org/D27803

Files:
  lib/Target/ARM/ARMCallLowering.cpp
  lib/Target/ARM/ARMInstructionSelector.cpp
  lib/Target/ARM/ARMLegalizerInfo.cpp
  test/CodeGen/ARM/GlobalISel/arm-instruction-select.mir
  test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
  test/CodeGen/ARM/GlobalISel/arm-isel.ll

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