[PATCH] D28777: [InstCombine][SSE] Add DemandedElts support for PACKSS/PACKUS instructions

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: lib/Transforms/InstCombine/InstCombineCalls.cpp:1831
+    APInt DemandedElts = APInt::getAllOnesValue(VWidth);
+    if (Value *V = SimplifyDemandedVectorElts(II, DemandedElts, UndefElts)) {
+      if (V != II)
----------------
mkuper wrote:
> This isn't a question about this patch (and maybe I'm not the person who should be reviewing it :-) ), but I'm now confused about how this works at all.
> 
> What's the benefit of calling SimplifyDemandedVectorElts() on an instruction when you're demanding all elements, the instruction you're calling this on will also demand all the elements of its operands, and throwing UndefElts away? Is this just so that things have a chance to happen in the middle of the tree?
Yeah this probably has no value for packs. Its useful for things like scalar intrinsics because they demand less elements from their inputs no matter what future users demand from the intrinsic.

I think this means PSHUFB doesn't need code in InstCombineCalls either.


Repository:
  rL LLVM

https://reviews.llvm.org/D28777