[llvm] r292035 - [InstCombine] add test to show missed vector fold; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 14 15:12:30 PST 2017


Author: spatel
Date: Sat Jan 14 17:12:29 2017
New Revision: 292035

URL: http://llvm.org/viewvc/llvm-project?rev=292035&view=rev
Log:
[InstCombine] add test to show missed vector fold; NFC

Modified:
    llvm/trunk/test/Transforms/InstCombine/signext.ll

Modified: llvm/trunk/test/Transforms/InstCombine/signext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/Transforms/InstCombine/signext.ll?rev=292035&r1=292034&r2=292035&view=diff
==============================================================================
--- llvm/trunk/test/Transforms/InstCombine/signext.ll (original)
+++ llvm/trunk/test/Transforms/InstCombine/signext.ll Sat Jan 14 17:12:29 2017
@@ -72,6 +72,19 @@ define i32 @test6(i16 %P) {
   ret i32 %tmp.5
 }
 
+define <2 x i32> @test6_splat_vec(<2 x i12> %P) {
+; CHECK-LABEL: @test6_splat_vec(
+; CHECK-NEXT:    [[Z:%.*]] = zext <2 x i12> %P to <2 x i32>
+; CHECK-NEXT:    [[SHL:%.*]] = shl nuw <2 x i32> [[Z]], <i32 20, i32 20>
+; CHECK-NEXT:    [[ASHR:%.*]] = ashr <2 x i32> [[SHL]], <i32 20, i32 20>
+; CHECK-NEXT:    ret <2 x i32> [[ASHR]]
+;
+  %z = zext <2 x i12> %P to <2 x i32>
+  %shl = shl <2 x i32> %z, <i32 20, i32 20>
+  %ashr = ashr <2 x i32> %shl, <i32 20, i32 20>
+  ret <2 x i32> %ashr
+}
+
 define i32 @test7(i32 %x) {
 ; CHECK-LABEL: @test7(
 ; CHECK-NEXT:    [[SUB:%.*]] = ashr i32 %x, 5




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