[PATCH] D28540: [NVPTX] Added support for half-precision floating point.

Artem Belevich via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 13 11:36:33 PST 2017


tra added inline comments.


================
Comment at: lib/Target/NVPTX/NVPTXAsmPrinter.cpp:370
+      // bits in size.  fp16 is returned as an integer, so this size
+      // adjustment applies to floats too.
+      if (size < 32)
----------------
jlebar wrote:
> Everywhere that we talk about f16s being stored/returned as/loaded as "integers" or "untyped integers", I think we should just say "a b16" or "an untyped value".  An "untyped integer" might mean something like llvm's i16, which is definitely an integer, but is "untyped" inasmuch as it might represent a signed or an unsigned int.  That's conceptually different from .b16, which is just a bag of bits.
> 
> I've noted places that would need to change with the comment "b16", but you don't have to change all of them to read "b16", so long as we don't say "untyped integer".  :)
I've attempted to reword the comments so they use .b16 to describe storage type of f16 we use in PTX.


================
Comment at: lib/Target/NVPTX/NVPTXInstrInfo.td:299
+               [(set Float16Regs:$dst, (OpNode Float16Regs:$a, Float16Regs:$b))]>,
+               Requires<[hasFP16Math, allowFMA, doF32FTZ]>;
+   def f16rr :
----------------
jlebar wrote:
> Heh, we should do a big rename of "doF32FTZ" in a separate patch.
Will do.


https://reviews.llvm.org/D28540





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