[PATCH] D28630: [PPC] Give unaligned memory access lower cost on processor that supports it

[Guozhi Wei via Phabricator via llvm-commits]

Carrot created this revision.
Carrot added reviewers: hfinkel, kbarton, echristo.
Carrot added a subscriber: llvm-commits.
Herald added subscribers: nemanjai, mehdi_amini.

Newer ppc supports unaligned memory access, it reduces the cost of unaligned memory access significantly. This patch handles this case in PPCTTIImpl::getMemoryOpCost.

This patch fixes pr31492.


https://reviews.llvm.org/D28630

Files:
  lib/Target/PowerPC/PPCTargetTransformInfo.cpp
  test/Analysis/CostModel/PowerPC/load_store.ll
  test/Analysis/CostModel/PowerPC/unaligned_ld_st.ll


Index: test/Analysis/CostModel/PowerPC/unaligned_ld_st.ll
===================================================================
--- test/Analysis/CostModel/PowerPC/unaligned_ld_st.ll
+++ test/Analysis/CostModel/PowerPC/unaligned_ld_st.ll
@@ -0,0 +1,26 @@
+; RUN: opt < %s -cost-model -analyze -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=+vsx | FileCheck %s
+target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
+target triple = "powerpc64-unknown-linux-gnu"
+
+define i32 @test(i32 %arg) {
+
+  ; CHECK: cost of 1 {{.*}} load
+  load i8, i8* undef, align 1
+  ; CHECK: cost of 1 {{.*}} load
+  load i16, i16* undef, align 1
+  ; CHECK: cost of 1 {{.*}} load
+  load i32, i32* undef, align 1
+  ; CHECK: cost of 1 {{.*}} load
+  load i64, i64* undef, align 1
+
+  ; CHECK: cost of 1 {{.*}} store
+  store i8 undef, i8* undef, align 1
+  ; CHECK: cost of 1 {{.*}} store
+  store i16 undef, i16* undef, align 1
+  ; CHECK: cost of 1 {{.*}} store
+  store i32 undef, i32* undef, align 1
+  ; CHECK: cost of 1 {{.*}} store
+  store i64 undef, i64* undef, align 1
+
+  ret i32 undef
+}
Index: test/Analysis/CostModel/PowerPC/load_store.ll
===================================================================
--- test/Analysis/CostModel/PowerPC/load_store.ll
+++ test/Analysis/CostModel/PowerPC/load_store.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s  -cost-model -analyze -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s
+; RUN: opt < %s  -cost-model -analyze -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 -disable-ppc-unaligned | FileCheck %s
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
Index: lib/Target/PowerPC/PPCTargetTransformInfo.cpp
===================================================================
--- lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+++ lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -401,6 +401,10 @@
   if (IsVSXType || (ST->hasVSX() && IsAltivecType))
     return Cost;
 
+  // Newer PPC supports unaligned memory access.
+  if (TLI->allowsMisalignedMemoryAccesses(LT.second, 0))
+    return Cost;
+
   // PPC in general does not support unaligned loads and stores. They'll need
   // to be decomposed based on the alignment factor.
 


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