[PATCH] D28578: [GlobalISel] correctly record PHI sources coming from switch instructions

[Tim Northover via Phabricator via llvm-commits]

t.p.northover created this revision.
t.p.northover added a reviewer: qcolombet.
t.p.northover added a subscriber: llvm-commits.
t.p.northover set the repository for this revision to rL LLVM.
Herald added subscribers: kristof.beyls, rovka, dberris, mcrosier.

GlobalISel lowers switches to a sequence of conditional branches spanning multiple basic blocks. This means that a single CFG edge at the IR level can change when the MIR has been generated. Successors are still well-behaved, but when querying the MachineBasicBlock predecessors (e.g. to translate a PHI), a more sophisticated analysis than `getOrCreateBB` is needed.

This adds a callback to `IRTranslator` that every translation which modifies the CFG (currently only switch translation) should be aware of. finishPendingPHIs then uses this extra information to create a correct PHI at the end of translation. If a switch instruction isn't involved in any of the PHI's predecessors then we fall back to the usually sufficient bijective map from BasicBlocks to MachineBasicBlocks.

This should fix at least one failure in the test-suite bot under GlobalISel (halide).


Repository:
  rL LLVM

https://reviews.llvm.org/D28578

Files:
  include/llvm/CodeGen/GlobalISel/IRTranslator.h
  lib/CodeGen/GlobalISel/IRTranslator.cpp
  test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D28578.84022.patch
Type: text/x-patch
Size: 7683 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20170111/b502ffbc/attachment.bin>