[PATCH] D28540: [NVPTX] Added support for half-precision floating point.

Artem Belevich via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 10 16:50:28 PST 2017


tra created this revision.
tra added reviewers: jlebar, jholewinski.
tra added a subscriber: llvm-commits.

Only scalar half-precision operations are supported at the moment.

- Adds general support for 'half' type in NVPTX
- fp16 math operations are supported on sm_53+ GPUs only (can be disabled with --nvptx-no-f16-math)
- type conversions to/from fp16 are supported on all GPU variants.
- On GPU variants that do not have full fp16 support (or if it's disabled), fp16 operations are promoted to fp32 and results are converted back to fp16 for storage.

ptxas is rather peculiar when it comes to fp16-related syntax, which had to be worked around:

- there's no way to represent immediate fp16 argument as a hex value. We load such constants into a .b16 register first.
- there are no .f16 variants of mov/ld/st instructions.
- ptxas only supports .f16 registers on sm_53+ only. It does accept .b16 registers for all supported fp16-related operations on all GPU variants, so that's the type the patch uses.
- NVPTX ABI explicitly states that fp16 can't be used as a function argument or return value. It also states that arguments and return values must be at least 32-bit wide. The patch follows the doc and uses .b32 for fp16 arguments and return values.

On the other hand, current fp16 implementation in nvcc uses a struct to represent fp16 type which results in nvcc passing fp16 as an aggregate. I'm not sure whether we want/need to follow nvcc and pass fp16 as aggregates, too.


https://reviews.llvm.org/D28540

Files:
  lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.cpp
  lib/Target/NVPTX/NVPTX.h
  lib/Target/NVPTX/NVPTXAsmPrinter.cpp
  lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
  lib/Target/NVPTX/NVPTXISelDAGToDAG.h
  lib/Target/NVPTX/NVPTXISelLowering.cpp
  lib/Target/NVPTX/NVPTXISelLowering.h
  lib/Target/NVPTX/NVPTXInstrInfo.cpp
  lib/Target/NVPTX/NVPTXInstrInfo.td
  lib/Target/NVPTX/NVPTXIntrinsics.td
  lib/Target/NVPTX/NVPTXMCExpr.cpp
  lib/Target/NVPTX/NVPTXMCExpr.h
  lib/Target/NVPTX/NVPTXRegisterInfo.cpp
  lib/Target/NVPTX/NVPTXRegisterInfo.td
  lib/Target/NVPTX/NVPTXSubtarget.cpp
  lib/Target/NVPTX/NVPTXSubtarget.h
  test/CodeGen/NVPTX/f16-instructions.ll
  test/CodeGen/NVPTX/half.ll

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