[llvm] r291562 - Revert "[mips] Honour -mno-odd-spreg for vector splat"

Simon Dardis via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 10 05:57:46 PST 2017


Author: sdardis
Date: Tue Jan 10 07:57:44 2017
New Revision: 291562

URL: http://llvm.org/viewvc/llvm-project?rev=291562&view=rev
Log:
Revert "[mips] Honour -mno-odd-spreg for vector splat"

This reverts commit r291556. It was a mixture of two differentials and
was missing a test.

Modified:
    llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
    llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp

Modified: llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp?rev=291562&r1=291561&r2=291562&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp Tue Jan 10 07:57:44 2017
@@ -11,7 +11,6 @@
 //
 //===----------------------------------------------------------------------===//
 
-#include "MCTargetDesc/MipsABIInfo.h"
 #include "MipsTargetStreamer.h"
 #include "InstPrinter/MipsInstPrinter.h"
 #include "MipsELFStreamer.h"
@@ -686,17 +685,6 @@ MipsTargetELFStreamer::MipsTargetELFStre
   // issues as well.
   unsigned EFlags = MCA.getELFHeaderEFlags();
 
-  // FIXME: Fix a dependency issue by instantiating the ABI object to some
-  // default based off the triple. The triple doesn't describe the target
-  // fully, but any external user of the API that uses the MCTargetStreamer
-  // would otherwise crash on assertion failure.
-
-  ABI = MipsABIInfo(
-      STI.getTargetTriple().getArch() == Triple::ArchType::mipsel ||
-              STI.getTargetTriple().getArch() == Triple::ArchType::mips
-          ? MipsABIInfo::O32()
-          : MipsABIInfo::N64());
-
   // Architecture
   if (Features[Mips::FeatureMips64r6])
     EFlags |= ELF::EF_MIPS_ARCH_64R6;

Modified: llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp?rev=291562&r1=291561&r2=291562&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsSEISelLowering.cpp Tue Jan 10 07:57:44 2017
@@ -3377,12 +3377,8 @@ MipsSETargetLowering::emitFILL_FW(Machin
   DebugLoc DL = MI.getDebugLoc();
   unsigned Wd = MI.getOperand(0).getReg();
   unsigned Fs = MI.getOperand(1).getReg();
-  unsigned Wt1 = RegInfo.createVirtualRegister(
-      Subtarget.useOddSPReg() ? &Mips::MSA128WRegClass
-                              : &Mips::MSA128WEvensRegClass);
-  unsigned Wt2 = RegInfo.createVirtualRegister(
-      Subtarget.useOddSPReg() ? &Mips::MSA128WRegClass
-                              : &Mips::MSA128WEvensRegClass);
+  unsigned Wt1 = RegInfo.createVirtualRegister(&Mips::MSA128WRegClass);
+  unsigned Wt2 = RegInfo.createVirtualRegister(&Mips::MSA128WRegClass);
 
   BuildMI(*BB, MI, DL, TII->get(Mips::IMPLICIT_DEF), Wt1);
   BuildMI(*BB, MI, DL, TII->get(Mips::INSERT_SUBREG), Wt2)




More information about the llvm-commits mailing list