[llvm] r290710 - [AMDGPU][mc] Enable absolute expressions in .hsa_code_object_isa directive

Artem Tamazov via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 29 07:41:52 PST 2016


Author: artem.tamazov
Date: Thu Dec 29 09:41:52 2016
New Revision: 290710

URL: http://llvm.org/viewvc/llvm-project?rev=290710&view=rev
Log:
[AMDGPU][mc] Enable absolute expressions in .hsa_code_object_isa directive

Among other stuff, this allows to use predefined .option.machine_version_major
/minor/stepping symbols in the directive.

Relevant test expanded at once (also file renamed for clarity).

Differential Revision: https://reviews.llvm.org/D28140

Added:
    llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_args.s
Removed:
    llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_noargs.s
Modified:
    llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp?rev=290710&r1=290709&r2=290710&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp Thu Dec 29 09:41:52 2016
@@ -722,6 +722,7 @@ class AMDGPUAsmParser : public MCTargetA
   /// }
 
 private:
+  bool ParseAsAbsoluteExpression(uint32_t &Ret);
   bool ParseDirectiveMajorMinor(uint32_t &Major, uint32_t &Minor);
   bool ParseDirectiveHSACodeObjectVersion();
   bool ParseDirectiveHSACodeObjectISA();
@@ -1708,24 +1709,31 @@ bool AMDGPUAsmParser::MatchAndEmitInstru
   llvm_unreachable("Implement any new match types added!");
 }
 
+bool AMDGPUAsmParser::ParseAsAbsoluteExpression(uint32_t &Ret) {
+  int64_t Tmp = -1;
+  if (getLexer().isNot(AsmToken::Integer) && getLexer().isNot(AsmToken::Identifier)) {
+    return true;
+  }
+  if (getParser().parseAbsoluteExpression(Tmp)) {
+    return true;
+  }
+  Ret = static_cast<uint32_t>(Tmp);
+  return false;
+}
+
+
 bool AMDGPUAsmParser::ParseDirectiveMajorMinor(uint32_t &Major,
                                                uint32_t &Minor) {
-  if (getLexer().isNot(AsmToken::Integer))
+  if (ParseAsAbsoluteExpression(Major))
     return TokError("invalid major version");
 
-  Major = getLexer().getTok().getIntVal();
-  Lex();
-
   if (getLexer().isNot(AsmToken::Comma))
     return TokError("minor version number required, comma expected");
   Lex();
 
-  if (getLexer().isNot(AsmToken::Integer))
+  if (ParseAsAbsoluteExpression(Minor))
     return TokError("invalid minor version");
 
-  Minor = getLexer().getTok().getIntVal();
-  Lex();
-
   return false;
 }
 
@@ -1765,12 +1773,9 @@ bool AMDGPUAsmParser::ParseDirectiveHSAC
     return TokError("stepping version number required, comma expected");
   Lex();
 
-  if (getLexer().isNot(AsmToken::Integer))
+  if (ParseAsAbsoluteExpression(Stepping))
     return TokError("invalid stepping version");
 
-  Stepping = getLexer().getTok().getIntVal();
-  Lex();
-
   if (getLexer().isNot(AsmToken::Comma))
     return TokError("vendor name required, comma expected");
   Lex();

Added: llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_args.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_args.s?rev=290710&view=auto
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_args.s (added)
+++ llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_args.s Thu Dec 29 09:41:52 2016
@@ -0,0 +1,31 @@
+// RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | FileCheck %s --check-prefix=ASM --check-prefix=ASM_700
+// RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=gfx804 -show-encoding %s | FileCheck %s --check-prefix=ASM --check-prefix=ASM_804
+// RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=stoney -show-encoding %s | FileCheck %s --check-prefix=ASM --check-prefix=ASM_810
+// RUN: llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | llvm-readobj -s -sd | FileCheck %s --check-prefix=ELF --check-prefix=ELF_700
+// RUN: llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=gfx804 -show-encoding %s | llvm-readobj -s -sd | FileCheck %s --check-prefix=ELF --check-prefix=ELF_804
+// RUN: llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=stoney -show-encoding %s | llvm-readobj -s -sd | FileCheck %s --check-prefix=ELF --check-prefix=ELF_810
+
+// ELF: SHT_NOTE
+// ELF: 0000: 04000000 08000000 01000000 414D4400
+// ELF: 0010: 01000000 00000000 04000000 1B000000
+// ELF_700: 0020: 03000000 414D4400 04000700 07000000
+// ELF_700: 0030: 00000000 00000000 414D4400 414D4447
+// ELF_804: 0020: 03000000 414D4400 04000700 08000000
+// ELF_804: 0030: 00000000 04000000 414D4400 414D4447
+// ELF_810: 0020: 03000000 414D4400 04000700 08000000
+// ELF_810: 0030: 01000000 00000000 414D4400 414D4447
+// ELF: 0040: 50550000
+
+.hsa_code_object_version 1,0
+// ASM: .hsa_code_object_version 1,0
+
+// Test defaults
+.hsa_code_object_isa
+// ASM_700: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
+// ASM_804: .hsa_code_object_isa 8,0,4,"AMD","AMDGPU"
+// ASM_810: .hsa_code_object_isa 8,1,0,"AMD","AMDGPU"
+
+// Test expressions and symbols
+.set A,2
+.hsa_code_object_isa A+1,A*2,A/A+4,"AMD","AMDGPU"
+// ASM: .hsa_code_object_isa 3,4,5,"AMD","AMDGPU"

Removed: llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_noargs.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_noargs.s?rev=290709&view=auto
==============================================================================
--- llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_noargs.s (original)
+++ llvm/trunk/test/MC/AMDGPU/hsa_code_object_isa_noargs.s (removed)
@@ -1,16 +0,0 @@
-// RUN: llvm-mc -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | FileCheck %s --check-prefix=ASM
-// RUN: llvm-mc -filetype=obj -triple amdgcn--amdhsa -mcpu=kaveri -show-encoding %s | llvm-readobj -s -sd | FileCheck %s --check-prefix=ELF
-
-// ELF: SHT_NOTE
-// ELF: 0000: 04000000 08000000 01000000 414D4400
-// ELF: 0010: 01000000 00000000 04000000 1B000000
-// ELF: 0020: 03000000 414D4400 04000700 07000000
-// ELF: 0030: 00000000 00000000 414D4400 414D4447
-// ELF: 0040: 50550000
-
-.hsa_code_object_version 1,0
-// ASM: .hsa_code_object_version 1,0
-
-.hsa_code_object_isa
-// ASM: .hsa_code_object_isa 7,0,0,"AMD","AMDGPU"
-




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