[PATCH] D28152: Cortex-A57 scheduling model for AMD backend (AArch32)

Andrew Zhogin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 28 21:27:01 PST 2016


andrew.zhogin created this revision.
andrew.zhogin added subscribers: asl, llvm-commits.
Herald added a subscriber: aemerson.

Implemented Cortex-A57 scheduling model: main code in ARMScheduleA57.td, ARMScheduleA57WriteRes.td.
Small changes in cpp/h files to support required scheduling predicates.
Scheduling model implemented according to http://infocenter.arm.com/help/topic/com.arm.doc.uan0015b/Cortex_A57_Software_Optimization_Guide_external.pdf.


https://reviews.llvm.org/D28152

Files:
  include/llvm/CodeGen/TargetSchedule.h
  lib/Target/ARM/ARM.td
  lib/Target/ARM/ARMBaseInstrInfo.cpp
  lib/Target/ARM/ARMBaseInstrInfo.h
  lib/Target/ARM/ARMSchedule.td
  lib/Target/ARM/ARMScheduleA57.td
  lib/Target/ARM/ARMScheduleA57WriteRes.td
  lib/Target/ARM/ARMSubtarget.h

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