[PATCH] D28017: AMD family 17h (znver1) enablement

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a reviewer: RKSimon.
RKSimon added a comment.

This needs tests for the clzero intrinsic (behind a -mattr=+clzero arg for 32 and 64-bit targets as well as -mcpu=znver1), in fact it probably make sense to separate the clzero support out into a separate preliminary patch and then add -mcpu=znver1 test as part of this one?



================
Comment at: lib/Target/X86/X86.td:804
+                                              znver1Features.Value, []>;
+def : znver1Proc<"znver1">;
+
----------------
Only one use so far - probably best to just declare it as :
```
def : ProcessorModel<"znver1", BtVer2Model, [
```
Also, add a TODO comment for a znver1 scheduler model


Repository:
  rL LLVM

https://reviews.llvm.org/D28017