[PATCH] D27892: AMDGPU: Update isFPImmLegal for f16

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Dec 17 18:56:46 PST 2016

arsenm created this revision.
arsenm added a subscriber: llvm-commits.
Herald added a reviewer: tstellarAMD.
Herald added subscribers: tony-tye, yaxunl, nhaehnle, wdng, kzhuravl.

I don't think this matters because ConstantFP is legal.



Index: lib/Target/AMDGPU/AMDGPUISelLowering.cpp
--- lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -498,7 +498,8 @@
 // FIXME: Why are we reporting vectors of FP immediates as legal?
 bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
   EVT ScalarVT = VT.getScalarType();
-  return (ScalarVT == MVT::f32 || ScalarVT == MVT::f64);
+  return (ScalarVT == MVT::f32 || ScalarVT == MVT::f64 ||
+         (ScalarVT == MVT::f16 && Subtarget->has16BitInsts()));
 // We don't want to shrink f64 / f32 constants.

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