[llvm] r289941 - [GlobalISel] Silence unused variable warnings in Release builds.

[Benjamin Kramer via llvm-commits]

Author: d0k
Date: Fri Dec 16 07:13:03 2016
New Revision: 289941

URL: http://llvm.org/viewvc/llvm-project?rev=289941&view=rev
Log:
[GlobalISel] Silence unused variable warnings in Release builds.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp

Modified: llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp?rev=289941&r1=289940&r2=289941&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstructionSelector.cpp Fri Dec 16 07:13:03 2016
@@ -39,13 +39,12 @@ static bool selectCopy(MachineInstr &I,
     return true;
 
   const RegisterBank *RegBank = RBI.getRegBank(DstReg, MRI, TRI);
+  (void)RegBank;
   assert(RegBank && "Can't get reg bank for virtual register");
 
-  const unsigned DstSize = MRI.getType(DstReg).getSizeInBits();
-  unsigned SrcReg = I.getOperand(1).getReg();
-  const unsigned SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI);
-  (void)SrcSize;
-  assert(DstSize == SrcSize && "Copy with different width?!");
+  assert(MRI.getType(DstReg).getSizeInBits() ==
+             RBI.getSizeInBits(I.getOperand(1).getReg(), MRI, TRI) &&
+         "Copy with different width?!");
 
   assert(RegBank->getID() == ARM::GPRRegBankID && "Unsupported reg bank");
   const TargetRegisterClass *RC = &ARM::GPRRegClass;