[llvm] r289473 - [PPC] Prefer direct move on power8 if load 1 or 2 bytes to VSR

[Guozhi Wei via llvm-commits]

Author: carrot
Date: Mon Dec 12 16:09:02 2016
New Revision: 289473

URL: http://llvm.org/viewvc/llvm-project?rev=289473&view=rev
Log:
[PPC] Prefer direct move on power8 if load 1 or 2 bytes to VSR

Power8 has MTVSRWZ but no LXSIBZX/LXSIHZX, so move 1 or 2 bytes to VSR through MTVSRWZ is much faster than store the extended value into stack and load it with LXSIWZX.
This patch fixes pr31144.

Differential Revision: https://reviews.llvm.org/D27287


Added:
    llvm/trunk/test/CodeGen/PowerPC/pr31144.ll
Modified:
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
    llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp?rev=289473&r1=289472&r2=289473&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.cpp Mon Dec 12 16:09:02 2016
@@ -6606,11 +6606,17 @@ void PPCTargetLowering::spliceIntoChain(
 /// \brief Analyze profitability of direct move
 /// prefer float load to int load plus direct move
 /// when there is no integer use of int load
-static bool directMoveIsProfitable(const SDValue &Op) {
+bool PPCTargetLowering::directMoveIsProfitable(const SDValue &Op) const {
   SDNode *Origin = Op.getOperand(0).getNode();
   if (Origin->getOpcode() != ISD::LOAD)
     return true;
 
+  // If there is no LXSIBZX/LXSIHZX, like Power8,
+  // prefer direct move if the memory size is 1 or 2 bytes.
+  MachineMemOperand *MMO = cast<LoadSDNode>(Origin)->getMemOperand();
+  if (!Subtarget.hasP9Vector() && MMO->getSize() <= 2)
+    return true;
+
   for (SDNode::use_iterator UI = Origin->use_begin(),
                             UE = Origin->use_end();
        UI != UE; ++UI) {

Modified: llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h?rev=289473&r1=289472&r2=289473&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCISelLowering.h Mon Dec 12 16:09:02 2016
@@ -815,6 +815,8 @@ namespace llvm {
                                 SelectionDAG &DAG, const SDLoc &dl) const;
     SDValue LowerFP_TO_INTDirectMove(SDValue Op, SelectionDAG &DAG,
                                      const SDLoc &dl) const;
+
+    bool directMoveIsProfitable(const SDValue &Op) const;
     SDValue LowerINT_TO_FPDirectMove(SDValue Op, SelectionDAG &DAG,
                                      const SDLoc &dl) const;
 

Added: llvm/trunk/test/CodeGen/PowerPC/pr31144.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/PowerPC/pr31144.ll?rev=289473&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/PowerPC/pr31144.ll (added)
+++ llvm/trunk/test/CodeGen/PowerPC/pr31144.ll Mon Dec 12 16:09:02 2016
@@ -0,0 +1,26 @@
+; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 -mattr=+vsx < %s | FileCheck %s --implicit-check-not lxsiwzx
+
+declare void @bar(double)
+
+define void @foo1(i8* %p) {
+entry:
+  %0 = load i8, i8* %p, align 1
+  %conv = uitofp i8 %0 to double
+  call void @bar(double %conv)
+  ret void
+
+; CHECK-LABEL: @foo1
+; CHECK:     mtvsrwz
+}
+
+define void @foo2(i16* %p) {
+entry:
+  %0 = load i16, i16* %p, align 2
+  %conv = uitofp i16 %0 to double
+  call void @bar(double %conv)
+  ret void
+
+; CHECK-LABEL: @foo2
+; CHECK:       mtvsrwz
+}
+