[PATCH] D27426: Remove spacing from Hexagon instruction syntax to match canonical form which doesn't contain spaces around tokens.

[Colin LeMahieu via Phabricator via llvm-commits]

colinl created this revision.
colinl added reviewers: kparzysz, bcahoon, sidneym.
colinl added a subscriber: llvm-commits.
colinl set the repository for this revision to rL LLVM.
Herald added a subscriber: qcolombet.

This removes spacing around tokenized characters which does not match the canonical instruction syntax.

Historically these spaces were added to force tokenization when TableGen only recognized a few characters.

This patch adds the full set of tokenizing characters to Hexagon.td, modifies the instructions' syntaxes to remove spacing, and fixed test cases to check for new syntax.


Repository:
  rL LLVM

https://reviews.llvm.org/D27426

Files:
  lib/Target/Hexagon/HexagonInstrAlias.td
  lib/Target/Hexagon/HexagonInstrInfo.td
  lib/Target/Hexagon/HexagonInstrInfoV3.td
  lib/Target/Hexagon/HexagonInstrInfoV4.td
  lib/Target/Hexagon/HexagonInstrInfoV5.td
  lib/Target/Hexagon/HexagonInstrInfoV60.td
  lib/Target/Hexagon/HexagonIsetDx.td
  lib/Target/Hexagon/HexagonSystemInst.td
  test/CodeGen/Hexagon/BranchPredict.ll
  test/CodeGen/Hexagon/absaddr-store.ll
  test/CodeGen/Hexagon/absimm.ll
  test/CodeGen/Hexagon/adde.ll
  test/CodeGen/Hexagon/addh-sext-trunc.ll
  test/CodeGen/Hexagon/addh-shifted.ll
  test/CodeGen/Hexagon/addh.ll
  test/CodeGen/Hexagon/addr-calc-opt.ll
  test/CodeGen/Hexagon/addrmode-indoff.ll
  test/CodeGen/Hexagon/alu64.ll
  test/CodeGen/Hexagon/always-ext.ll
  test/CodeGen/Hexagon/args.ll
  test/CodeGen/Hexagon/avoid-predspill-calleesaved.ll
  test/CodeGen/Hexagon/avoid-predspill.ll
  test/CodeGen/Hexagon/bit-eval.ll
  test/CodeGen/Hexagon/bit-loop.ll
  test/CodeGen/Hexagon/bit-rie.ll
  test/CodeGen/Hexagon/bit-skip-byval.ll
  test/CodeGen/Hexagon/bit-validate-reg.ll
  test/CodeGen/Hexagon/block-addr.ll
  test/CodeGen/Hexagon/branchfolder-keep-impdef.ll
  test/CodeGen/Hexagon/brev_ld.ll
  test/CodeGen/Hexagon/brev_st.ll
  test/CodeGen/Hexagon/builtin-prefetch-offset.ll
  test/CodeGen/Hexagon/calling-conv-2.ll
  test/CodeGen/Hexagon/callr-dep-edge.ll
  test/CodeGen/Hexagon/cext-check.ll
  test/CodeGen/Hexagon/cext-valid-packet1.ll
  test/CodeGen/Hexagon/cext.ll
  test/CodeGen/Hexagon/cexti16.ll
  test/CodeGen/Hexagon/circ-load-isel.ll
  test/CodeGen/Hexagon/circ_ld.ll
  test/CodeGen/Hexagon/circ_ldw.ll
  test/CodeGen/Hexagon/circ_st.ll
  test/CodeGen/Hexagon/clr_set_toggle.ll
  test/CodeGen/Hexagon/cmp-to-genreg.ll
  test/CodeGen/Hexagon/cmp-to-predreg.ll
  test/CodeGen/Hexagon/cmp.ll
  test/CodeGen/Hexagon/cmpb-eq.ll
  test/CodeGen/Hexagon/combine.ll
  test/CodeGen/Hexagon/compound.ll
  test/CodeGen/Hexagon/constp-combine-neg.ll
  test/CodeGen/Hexagon/convertdptoint.ll
  test/CodeGen/Hexagon/convertdptoll.ll
  test/CodeGen/Hexagon/convertsptoint.ll
  test/CodeGen/Hexagon/convertsptoll.ll
  test/CodeGen/Hexagon/ctlz-cttz-ctpop.ll
  test/CodeGen/Hexagon/dead-store-stack.ll
  test/CodeGen/Hexagon/doubleconvert-ieee-rnd-near.ll
  test/CodeGen/Hexagon/early-if-vecpi.ll
  test/CodeGen/Hexagon/eh_return.ll
  test/CodeGen/Hexagon/expand-vstorerw-undef.ll
  test/CodeGen/Hexagon/extload-combine.ll
  test/CodeGen/Hexagon/extract-basic.ll
  test/CodeGen/Hexagon/fadd.ll
  test/CodeGen/Hexagon/fcmp.ll
  test/CodeGen/Hexagon/fixed-spill-mutable.ll
  test/CodeGen/Hexagon/float-amode.ll
  test/CodeGen/Hexagon/fmul.ll
  test/CodeGen/Hexagon/frame.ll
  test/CodeGen/Hexagon/fsel.ll
  test/CodeGen/Hexagon/fsub.ll
  test/CodeGen/Hexagon/fusedandshift.ll
  test/CodeGen/Hexagon/gp-plus-offset-load.ll
  test/CodeGen/Hexagon/gp-rel.ll
  test/CodeGen/Hexagon/hwloop-cleanup.ll
  test/CodeGen/Hexagon/hwloop-crit-edge.ll
  test/CodeGen/Hexagon/hwloop-loop1.ll
  test/CodeGen/Hexagon/hwloop1.ll
  test/CodeGen/Hexagon/hwloop2.ll
  test/CodeGen/Hexagon/hwloop4.ll
  test/CodeGen/Hexagon/hwloop5.ll
  test/CodeGen/Hexagon/idxload-with-zero-offset.ll
  test/CodeGen/Hexagon/ifcvt-diamond-bug-2016-08-26.ll
  test/CodeGen/Hexagon/insert-basic.ll
  test/CodeGen/Hexagon/insert4.ll
  test/CodeGen/Hexagon/intrinsics/alu32_alu.ll
  test/CodeGen/Hexagon/intrinsics/alu32_perm.ll
  test/CodeGen/Hexagon/intrinsics/cr.ll
  test/CodeGen/Hexagon/intrinsics/system_user.ll
  test/CodeGen/Hexagon/intrinsics/xtype_alu.ll
  test/CodeGen/Hexagon/intrinsics/xtype_bit.ll
  test/CodeGen/Hexagon/intrinsics/xtype_complex.ll
  test/CodeGen/Hexagon/intrinsics/xtype_fp.ll
  test/CodeGen/Hexagon/intrinsics/xtype_mpy.ll
  test/CodeGen/Hexagon/intrinsics/xtype_perm.ll
  test/CodeGen/Hexagon/intrinsics/xtype_pred.ll
  test/CodeGen/Hexagon/intrinsics/xtype_shift.ll
  test/CodeGen/Hexagon/macint.ll
  test/CodeGen/Hexagon/memops-stack.ll
  test/CodeGen/Hexagon/memops.ll
  test/CodeGen/Hexagon/memops1.ll
  test/CodeGen/Hexagon/memops2.ll
  test/CodeGen/Hexagon/memops3.ll
  test/CodeGen/Hexagon/mpy.ll
  test/CodeGen/Hexagon/newvalueSameReg.ll
  test/CodeGen/Hexagon/newvaluejump.ll
  test/CodeGen/Hexagon/newvaluejump2.ll
  test/CodeGen/Hexagon/newvaluestore.ll
  test/CodeGen/Hexagon/opt-addr-mode.ll
  test/CodeGen/Hexagon/opt-fabs.ll
  test/CodeGen/Hexagon/opt-fneg.ll
  test/CodeGen/Hexagon/opt-spill-volatile.ll
  test/CodeGen/Hexagon/packetize-return-arg.ll
  test/CodeGen/Hexagon/pic-jumptables.ll
  test/CodeGen/Hexagon/pic-local.ll
  test/CodeGen/Hexagon/pic-regusage.ll
  test/CodeGen/Hexagon/pic-simple.ll
  test/CodeGen/Hexagon/pic-static.ll
  test/CodeGen/Hexagon/postinc-offset.ll
  test/CodeGen/Hexagon/postinc-store.ll
  test/CodeGen/Hexagon/pred-absolute-store.ll
  test/CodeGen/Hexagon/pred-gp.ll
  test/CodeGen/Hexagon/pred-instrs.ll
  test/CodeGen/Hexagon/predicate-copy.ll
  test/CodeGen/Hexagon/predicate-logical.ll
  test/CodeGen/Hexagon/predicate-rcmp.ll
  test/CodeGen/Hexagon/rdf-copy.ll
  test/CodeGen/Hexagon/restore-single-reg.ll
  test/CodeGen/Hexagon/ret-struct-by-val.ll
  test/CodeGen/Hexagon/select-instr-align.ll
  test/CodeGen/Hexagon/sffms.ll
  test/CodeGen/Hexagon/signed_immediates.ll
  test/CodeGen/Hexagon/stack-align1.ll
  test/CodeGen/Hexagon/stack-align2.ll
  test/CodeGen/Hexagon/stack-alloca1.ll
  test/CodeGen/Hexagon/stack-alloca2.ll
  test/CodeGen/Hexagon/store-shift.ll
  test/CodeGen/Hexagon/storerinewabs.ll
  test/CodeGen/Hexagon/struct_args.ll
  test/CodeGen/Hexagon/sube.ll
  test/CodeGen/Hexagon/subi-asl.ll
  test/CodeGen/Hexagon/swp-const-tc.ll
  test/CodeGen/Hexagon/swp-matmul-bitext.ll
  test/CodeGen/Hexagon/swp-max.ll
  test/CodeGen/Hexagon/swp-multi-loops.ll
  test/CodeGen/Hexagon/swp-vect-dotprod.ll
  test/CodeGen/Hexagon/swp-vmult.ll
  test/CodeGen/Hexagon/swp-vsum.ll
  test/CodeGen/Hexagon/tail-dup-subreg-map.ll
  test/CodeGen/Hexagon/tfr-to-combine.ll
  test/CodeGen/Hexagon/tls_pic.ll
  test/CodeGen/Hexagon/tls_static.ll
  test/CodeGen/Hexagon/two-crash.ll
  test/CodeGen/Hexagon/v60-cur.ll
  test/CodeGen/Hexagon/v60-vsel1.ll
  test/CodeGen/Hexagon/v60Intrins.ll
  test/CodeGen/Hexagon/v60small.ll
  test/CodeGen/Hexagon/vaddh.ll
  test/CodeGen/Hexagon/vec-pred-spill1.ll
  test/CodeGen/Hexagon/vect/vect-cst-v4i32.ll
  test/CodeGen/Hexagon/vect/vect-loadv4i16.ll
  test/CodeGen/Hexagon/vect/vect-shift-imm.ll
  test/CodeGen/Hexagon/vect/vect-vshifts.ll
  test/CodeGen/Hexagon/vect/vect-xor.ll
  test/CodeGen/Hexagon/vload-postinc-sel.ll
  test/CodeGen/Hexagon/zextloadi1.ll
  test/MC/Disassembler/Hexagon/alu32_alu.txt
  test/MC/Disassembler/Hexagon/alu32_perm.txt
  test/MC/Disassembler/Hexagon/alu32_pred.txt
  test/MC/Disassembler/Hexagon/cr.txt
  test/MC/Disassembler/Hexagon/j.txt
  test/MC/Disassembler/Hexagon/jr.txt
  test/MC/Disassembler/Hexagon/ld.txt
  test/MC/Disassembler/Hexagon/memop.txt
  test/MC/Disassembler/Hexagon/nv_j.txt
  test/MC/Disassembler/Hexagon/nv_st.txt
  test/MC/Disassembler/Hexagon/st.txt
  test/MC/Disassembler/Hexagon/system_user.txt
  test/MC/Disassembler/Hexagon/xtype_alu.txt
  test/MC/Disassembler/Hexagon/xtype_bit.txt
  test/MC/Disassembler/Hexagon/xtype_complex.txt
  test/MC/Disassembler/Hexagon/xtype_fp.txt
  test/MC/Disassembler/Hexagon/xtype_mpy.txt
  test/MC/Disassembler/Hexagon/xtype_perm.txt
  test/MC/Disassembler/Hexagon/xtype_pred.txt
  test/MC/Disassembler/Hexagon/xtype_shift.txt
  test/MC/Hexagon/align.s
  test/MC/Hexagon/asmMap.s
  test/MC/Hexagon/capitalizedEndloop.s
  test/MC/Hexagon/dis-duplex-p0.s
  test/MC/Hexagon/duplex-registers.s
  test/MC/Hexagon/fixups.s
  test/MC/Hexagon/iconst.s
  test/MC/Hexagon/inst_cmp_eq.ll
  test/MC/Hexagon/inst_cmp_eqi.ll
  test/MC/Hexagon/inst_cmp_gt.ll
  test/MC/Hexagon/inst_cmp_gti.ll
  test/MC/Hexagon/inst_cmp_lt.ll
  test/MC/Hexagon/inst_cmp_ugt.ll
  test/MC/Hexagon/inst_cmp_ugti.ll
  test/MC/Hexagon/inst_cmp_ult.ll
  test/MC/Hexagon/jumpdoublepound.s
  test/MC/Hexagon/labels.s
  test/MC/Hexagon/register-alt-names.s
  test/MC/Hexagon/relaxed_newvalue.s
  test/MC/Hexagon/relocations.s
  test/MC/Hexagon/v60-alu.s
  test/MC/Hexagon/v60-misc.s
  test/MC/Hexagon/v60-permute.s
  test/MC/Hexagon/v60-shift.s
  test/MC/Hexagon/v60-vcmp.s
  test/MC/Hexagon/v60-vmem.s
  test/MC/Hexagon/v60-vmpy-acc.s
  test/MC/Hexagon/v60-vmpy1.s
  test/MC/Hexagon/v60lookup.s

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