[PATCH] D27414: [ARM] Better error message for invalid flag-preserving Thumb1 insts

[Oliver Stannard via Phabricator via llvm-commits]

olista01 created this revision.
olista01 added reviewers: rengolin, t.p.northover.
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olista01 set the repository for this revision to rL LLVM.
Herald added a subscriber: aemerson.

When we see a non flag-setting instruction for which only the flag-setting version is available in Thumb1, we should give a better error message than "invalid instruction".


Repository:
  rL LLVM

https://reviews.llvm.org/D27414

Files:
  lib/Target/ARM/AsmParser/ARMAsmParser.cpp
  test/MC/ARM/thumb-diagnostics.s


Index: test/MC/ARM/thumb-diagnostics.s
===================================================================
--- test/MC/ARM/thumb-diagnostics.s
+++ test/MC/ARM/thumb-diagnostics.s
@@ -11,7 +11,7 @@
 
 @ ADD instruction w/o 'S' suffix.
         add r1, r2, r3
-@ CHECK-ERRORS: error: invalid instruction
+@ CHECK-ERRORS: error: no flag-preserving variant of this instruction available
 @ CHECK-ERRORS:         add r1, r2, r3
 @ CHECK-ERRORS:         ^
 
Index: lib/Target/ARM/AsmParser/ARMAsmParser.cpp
===================================================================
--- lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -523,6 +523,7 @@
     Match_RequiresV6,
     Match_RequiresThumb2,
     Match_RequiresV8,
+    Match_RequiresFlagSetting,
 #define GET_OPERAND_DIAGNOSTIC_TYPES
 #include "ARMGenAsmMatcher.inc"
 
@@ -8905,7 +8906,7 @@
       ;
     // If we're parsing Thumb1, reject it completely.
     if (isThumbOne() && Inst.getOperand(OpNo).getReg() != ARM::CPSR)
-      return Match_MnemonicFail;
+      return Match_RequiresFlagSetting;
     // If we're parsing Thumb2, which form is legal depends on whether we're
     // in an IT block.
     if (isThumbTwo() && Inst.getOperand(OpNo).getReg() != ARM::CPSR &&
@@ -9171,6 +9172,8 @@
     return Error(IDLoc, "instruction variant requires Thumb2");
   case Match_RequiresV8:
     return Error(IDLoc, "instruction variant requires ARMv8 or later");
+  case Match_RequiresFlagSetting:
+    return Error(IDLoc, "no flag-preserving variant of this instruction available");
   case Match_ImmRange0_15: {
     SMLoc ErrorLoc = ((ARMOperand &)*Operands[ErrorInfo]).getStartLoc();
     if (ErrorLoc == SMLoc()) ErrorLoc = IDLoc;


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