[PATCH] D23630: [PPC] Expand ISEL instruction into if-then-else sequence

Kit Barton via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 1 08:12:31 PST 2016

kbarton added a comment.

In https://reviews.llvm.org/D23630#609933, @hfinkel wrote:

> I've been thinking about how difficult it might be to handle the case where multiple isels use the same condition. I don't think it would be too difficult to support this:  As you iterate through the isels in each block, keep track of the true block, false block and condition for the last expanded isel. If this isel has the same condition as the last one, then scan between them to make sure that nothing defines this isel's input registers in between the two isels and that this isel does not depend on the last one. If that's true, then insert the generated instructions into the blocks from the last isel instead of making new ones.

I agree this can be done, and set up the original code to make this fairly straightforward. I had hoped to make a decision about whether we want ISEL generated or not before making further improvements to this patch, but it may be better to handle this case first, as it can effect performance and thus influence the final decision regarding what the defaults for ISEL generation will be.

Comment at: lib/Target/PowerPC/PPCExpandISEL.cpp:88
+  ///
+  /// \brief Determine whether to generate the ISEL instruction or expand it
+  ///
We can remove all uses of \brief since doxygen autobrief is now enabled by default. 


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