[PATCH] D26103: Add tips for generic IR vs architecture specific code.

[Philip Reames via Phabricator via llvm-commits]

reames requested changes to this revision.
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After reading through the draft text a couple of times, I'm really not clear what your message is and why it belongs here.  Having target specific lowering details in generic documentation seems strange?



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Comment at: docs/Frontend/PerformanceTips.rst:126
+Whenever possible, the IR generated should be generic IR, instead of architecture
+specific IR (i.e. intrinsics).
+If LLVM cannot lower the generic code to the desired intrinsic, start a discussion
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What is the take away from this piece of advice?  

small edits: 
e.g. intrinsics or inline asm.
define "generic IR" or use alternate phrase


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Comment at: docs/Frontend/PerformanceTips.rst:130
+for the missing lowering opportunity.
+A few known patterns that lead to lowering to intrinsics are listed below.
+
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>From this sentance, I'm not sure what to expect.  Are these patterns where generic IR *does* work, or does not work?


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Comment at: docs/Frontend/PerformanceTips.rst:132
+
+The *interleaved access pass* performs the following lowerings (tests can be found in CodeGen/ARM/arm-interleaved-accesses.ll and CodeGen/AArch64/aarch64-interleaved-accesses.ll):
+
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Why should this pass get special treatment in target neutral documentation?  We don't talk about ISEL here for instance.


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Comment at: docs/Frontend/PerformanceTips.rst:143
+
+         Is lowered to: 
+                ::
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Lowered by whom, and why does a frontend author care?


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Comment at: docs/Frontend/PerformanceTips.rst:205
+
+LLVM does not promise to be performance aware, so the above patterns, while generic IR,  are still recommended for the particular platforms.
+For more suggestions of architecture specific patterns, please send
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This sentence does not parse for me.


https://reviews.llvm.org/D26103