[PATCH] D27287: [PPC] Prefer direct move on power8 if load 1 or 2 bytes to VSR

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai added inline comments.


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Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:6617
 
+  // Power8 has MTVSRWZ but no LXSIBZX/LXSIHZX,
+  // so prefer direct move if the memory size is 1 or 2 bytes.
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This is really a property of the ISA rather than the actual CPU. I think a better way of accomplishing this would be to check that the subtarget does not have "hasP9Vector()" because that's where the LXSIBZX/LXSIHZX become available. Even if that means this has to become a member function then.


https://reviews.llvm.org/D27287