[llvm] r288011 - [X86][FMA4] Remove isCommutable from FMA4 scalar intrinsics. They aren't commutable as operand 0 should pass its upper bits through to the output.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 27 13:37:05 PST 2016


Author: ctopper
Date: Sun Nov 27 15:37:04 2016
New Revision: 288011

URL: http://llvm.org/viewvc/llvm-project?rev=288011&view=rev
Log:
[X86][FMA4] Remove isCommutable from FMA4 scalar intrinsics. They aren't commutable as operand 0 should pass its upper bits through to the output.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrFMA.td

Modified: llvm/trunk/lib/Target/X86/X86InstrFMA.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFMA.td?rev=288011&r1=288010&r2=288011&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrFMA.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrFMA.td Sun Nov 27 15:37:04 2016
@@ -301,7 +301,6 @@ let isCodeGenOnly = 1, ForceDisassemble
 multiclass fma4s_int<bits<8> opc, string OpcodeStr, Operand memop,
                      ComplexPattern mem_cpat, Intrinsic Int> {
 let isCodeGenOnly = 1 in {
-  let isCommutable = 1 in
   def rr_Int : FMA4<opc, MRMSrcRegOp4, (outs VR128:$dst),
                (ins VR128:$src1, VR128:$src2, VR128:$src3),
                !strconcat(OpcodeStr,




More information about the llvm-commits mailing list