[PATCH] D26713: [ppc] Legalize the load of MVT::v4i8 into VSX register

[Nemanja Ivanovic via llvm-commits]

nemanjai added inline comments.


================
Comment at: lib/Target/PowerPC/PPCISelLowering.cpp:680
+
+      setLoadExtAction(ISD::EXTLOAD, MVT::v16i8, MVT::v4i8, Custom);
     }
----------------
Carrot wrote:
> nemanjai wrote:
> > Is there more to this patch? Taking a quick look in PPCISelLowering.cpp, I don't see which custom lowering function will be invoked that will actually handle this node. Of course, it's entirely possible that I just missed it.
> You didn't miss anything.
> After vectorization following load instruction is generated
> %wide.load = load <4 x i8>, <4 x i8>* %lsr.iv16, align 1, !tbaa !1
> 
> In lowering phase, it is translated to following SDNode
> t5: v4i8,ch = load<LD4[%lsr.iv16](align=1)(tbaa=<0xa868c68>)> t0, t2, undef:i64
> 
> And after LegalizeTypes(), 
>       t48: i32,ch = load<LD4[%lsr.iv16](align=1)(tbaa=<0xa868c68>)> t0, t2, undef:i64
>     t49: v4i32 = scalar_to_vector t48
>   t50: v16i8 = bitcast t49
> 
> And then it is directly translated to LXSIWAX.
> So it is already correctly handled.
I see, legalization eliminates this illegal type and this patch just serves to provide a better answer when TTI checks if this is "LegalOrCustom" so that the vectorizer does not consider this too expensive to be profitable.
If that understanding is correct, could you please add a comment outlining this above this line so that it is clear why this is a Custom operation?


https://reviews.llvm.org/D26713