[PATCH] D26398: [mips][msa] Implement f16 support

[Simon Dardis via llvm-commits]

sdardis removed rL LLVM as the repository for this revision.
sdardis updated this revision to Diff 78347.
sdardis marked 2 inline comments as done.
sdardis added a comment.
This revision is now accepted and ready to land.

Updated the handling of loads and stores for f16 to better match the register class that is actually used. Added test coverage for that area. We're still unable to enable the machine verifier for this, as some MSA instructions are missing their 64 bit counterparts (fill, copy_[su].[bhwd] relating to this patch).


https://reviews.llvm.org/D26398

Files:
  lib/Target/Mips/MipsMSAInstrInfo.td
  lib/Target/Mips/MipsRegisterInfo.td
  lib/Target/Mips/MipsSEISelLowering.cpp
  lib/Target/Mips/MipsSEISelLowering.h
  test/CodeGen/Mips/msa/f16-llvm-ir.ll
  test/CodeGen/Mips/msa/fexuprl.ll

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